WIP: Support Short (8/16 bit) atomic RMW operations on RISCV #297
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Signed-off-by: Máté Tokodi [email protected]
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| if (!(operationSize & SLJIT_32) && operationSize != SLJIT_MOV32) { | ||
| compareTopFalse = sljit_emit_cmp(compiler, SLJIT_NOT_EQUAL, SLJIT_IMM, 0, srcExpectedPair.arg2, srcExpectedPair.arg2w); | ||
| } | ||
| if (noShortAtomic && size <= 2) { | ||
| sljit_emit_op2(compiler, SLJIT_AND, maskReg, 0, baseReg, 0, SLJIT_IMM, 0x3); | ||
| sljit_emit_op2(compiler, SLJIT_SHL, maskReg, 0, maskReg, 0, SLJIT_IMM, 3); // multiply by 8 |
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32 bit atomic should be present, so mutiply by 4 should be enough
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Add support for short atomic RMW operations for RISCV
This patch is not yet functional on 32 bit, but considering the increase in the number of instructions required, it may the worthwhile to consider using callback functions in those cases instead.