1050: Master rebase with GHE patches (openbmc#4)

Signed-off-by: Manojkiran Eda <[email protected]>

Signed-off-by: Manojkiran Eda <[email protected]>

include/libpldm/meson.build

@@ -11,6 +11,7 @@ libpldm_headers += files(
   'state_set.h',
   'fru.h',
   'utils.h',
+  'pdr_data.h',
   'pdr.h',
   'firmware_update.h'
   )
@@ -23,6 +24,7 @@ if get_option('oem-ibm').enabled()
     'oem/ibm/libpldm/host.h',
     'oem/ibm/libpldm/fru_oem_ibm.h',
     'oem/ibm/libpldm/platform_oem_ibm.h',
+    'oem/ibm/libpldm/pdr_oem_ibm.h',
     'oem/ibm/libpldm/state_set_oem_ibm.h'
   )
 endif

include/libpldm/oem/ibm/libpldm/file_io.h

@@ -59,7 +59,17 @@ enum pldm_fileio_file_type {
 	PLDM_FILE_TYPE_RESOURCE_DUMP_PARMS = 0x8,
 	PLDM_FILE_TYPE_RESOURCE_DUMP = 0x9,
 	PLDM_FILE_TYPE_PROGRESS_SRC = 0xA,
+	PLDM_FILE_TYPE_ADJUNCT_DUMP = 0xB,
+	PLDM_FILE_TYPE_DEVICE_DUMP = 0xC,
+	PLDM_FILE_TYPE_COD_LICENSE_KEY = 0xD,
+	PLDM_FILE_TYPE_COD_LICENSED_RESOURCES = 0xE,
+	PLDM_FILE_TYPE_BMC_DUMP = 0xF,
+	PLDM_FILE_TYPE_SBE_DUMP = 0x10,
+	PLDM_FILE_TYPE_HOSTBOOT_DUMP = 0x11,
+	PLDM_FILE_TYPE_HARDWARE_DUMP = 0x12,
 	PLDM_FILE_TYPE_LID_RUNNING = 0x13,
+	PLDM_FILE_TYPE_PCIE_TOPOLOGY = 0x14,
+	PLDM_FILE_TYPE_CABLE_INFO = 0x15,
 };
 
 #define PLDM_RW_FILE_MEM_REQ_BYTES 20

include/libpldm/oem/ibm/libpldm/fru_oem_ibm.h

@@ -12,6 +12,8 @@ enum pldm_oem_ibm_fru_field_type {
 	PLDM_OEM_FRU_FIELD_TYPE_IANA = 0X01,
 	PLDM_OEM_FRU_FIELD_TYPE_RT = 0X02,
 	PLDM_OEM_FRU_FIELD_TYPE_LOCATION_CODE = 0XFE,
+	PLDM_OEM_FRU_FIELD_TYPE_PCIE_CONFIG_SPACE_DATA = 0XFD,
+	PLDM_OEM_FRU_FIELD_TYPE_FIRMWARE_UAK = 0XFC,
 };
 
 #ifdef __cplusplus

include/libpldm/oem/ibm/libpldm/pdr_oem_ibm.h

@@ -0,0 +1,42 @@
+#ifndef PDR_OEM_IBM_H
+#define PDR_OEM_IBM_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "pdr_data.h"
+#include "platform.h"
+#include <assert.h>
+#include <stddef.h>
+#include <stdint.h>
+
+/** @brief Find the last local record
+ *
+ *  @param[in] repo - opaque pointer acting as a PDR repo handle
+ *
+ *  @return opaque pointer to the PDR record,will be NULL if record was not
+ * found
+ */
+pldm_pdr_record *pldm_pdr_find_last_local_record(const pldm_pdr *repo);
+
+/** @brief method to check if the record handle is within the HostBoot range
+ *  or not
+ *
+ *  @param[in] record_handle - record handle of the pdr
+ */
+bool isHBRange(const uint32_t record_handle);
+
+/** @brief find the container ID of the contained entity
+ *
+ *  @param[in] repo - opaque pointer acting as a PDR repo handle
+ *  @param[in] entityType - entity type
+ *  @param[in] entityInstance - instance of the entity
+ */
+uint16_t pldm_find_container_id(const pldm_pdr *repo, uint16_t entityType,
+				uint16_t entityInstance);
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* PDR_OEM_IBM_H */

include/libpldm/oem/ibm/libpldm/state_set_oem_ibm.h

@@ -12,7 +12,27 @@ enum ibm_oem_pldm_state_set_ids {
 	PLDM_OEM_IBM_VERIFICATION_STATE = 32770,
 	PLDM_OEM_IBM_SYSTEM_POWER_STATE = 32771,
 	PLDM_OEM_IBM_SBE_MAINTENANCE_STATE = 32772,
+	PLDM_OEM_IBM_BOOT_SIDE_RENAME = 32773,
+	PLDM_OEM_IBM_SBE_SEMANTIC_ID = 32775,
 	PLDM_OEM_IBM_SBE_HRESET_STATE = 32776,
+
+	PLDM_OEM_IBM_PANEL_TRIGGER_STATE = 32778,
+	PLDM_OEM_IBM_SLOT_ENABLE_EFFECTER_STATE = 32779,
+	PLDM_OEM_IBM_SLOT_ENABLE_SENSOR_STATE = 32780,
+	PLDM_OEM_IBM_PCIE_TOPOLOGY_ACTIONS = 32781,
+};
+
+enum ibm_slot_enable_effecter_state {
+	ADD = 0x1,
+	REMOVE = 0x2,
+	REPLACE = 0x3,
+};
+
+enum ibm_slot_enable_sensor_state {
+	SLOT_STATE_UNKOWN = 0x0,
+	SLOT_STATE_ENABLED = 0x1,
+	SLOT_STATE_DISABLED = 0x2,
+	SLOT_STATE_ERROR = 0x03,
 };
 
 enum ibm_oem_pldm_state_set_firmware_update_state_values {
@@ -45,12 +65,22 @@ enum ibm_oem_pldm_state_set_sbe_dump_state_values {
 	SBE_RETRY_REQUIRED = 0x2,
 };
 
+enum ibm_oem_pldm_state_set_boot_side_rename_state_values {
+	PLDM_BOOT_SIDE_NOT_RENAMED = 1,
+	PLDM_BOOT_SIDE_HAS_BEEN_RENAMED = 2,
+};
 enum ibm_oem_pldm_state_set_sbe_hreset_state_values {
 	SBE_HRESET_NOT_READY = 0x1,
 	SBE_HRESET_READY = 0x2,
 	SBE_HRESET_FAILED = 0x3,
 };
 
+enum pldm_oem_pcie_topology_actions {
+	GET_PCIE_TOPOLOGY = 0x1,
+	GET_CABLE_INFO = 0x2,
+	SAVE_PCIE_TOPLOGY = 0x03,
+};
+
 #ifdef __cplusplus
 }
 #endif