Merge pull request #1315 from zaliu/master

merge staging 18875ad into master with GO from CQE
ROCm · Mar 26, 2021 · 9ff7d7f · 9ff7d7f
2 parents 3438af2 + 1b00f4a
commit 9ff7d7f
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Showing 134 changed files with 166,141 additions and 623 deletions.
diff --git a/.jenkins/precheckin.groovy b/.jenkins/precheckin.groovy
@@ -54,7 +54,7 @@ ci: {
     def jobNameList = ["compute-rocm-dkms-no-npi-hipclang":([ubuntu18:['gfx900','gfx906','gfx908']]),
                        "rocm-docker":([ubuntu18:['gfx908']])]
 
-    // jobNameList = auxiliary.appendJobNameList(jobNameList)
+    jobNameList = auxiliary.appendJobNameList(jobNameList)
 
     propertyList.each
     {

diff --git a/CHANGELOG.md b/CHANGELOG.md
@@ -1,4 +1,7 @@
 # Change Log for Tensile
+## [(Unreleased) Tensile 4.28.0 for ROCm 4.3.0]
+### Fixed
+- TensileCreateLibrary crash with relative output and --merge-files
 
 ## [Tensile 4.27.0 for ROCm 4.2.0]
 ### Added

diff --git a/HostLibraryTests/CMakeLists.txt b/HostLibraryTests/CMakeLists.txt
@@ -26,6 +26,8 @@ project(TensileHostLibraryTest)
 set( CMAKE_CXX_STANDARD 14 )
 set( CMAKE_CXX_EXTENSIONS OFF )
 
+list(APPEND CMAKE_PREFIX_PATH $ENV{ROCM_PATH} /opt/rocm)
+
 option(TENSILE_USE_HIP       "Use the Hip runtime." ON)
 option(TENSILE_USE_LLVM      "Use LLVM for parsing config files." ON)
 option(TENSILE_USE_MSGPACK   "Use msgpack for parsing config files." ON)
@@ -127,7 +129,13 @@ set(test_sources ${test_sources}
 )
 
 if(TENSILE_USE_LLVM)
-    find_package(LLVM 6.0 REQUIRED CONFIG)
+    find_package(LLVM 13.0 QUIET CONFIG)
+    if(NOT LLVM_FOUND)
+        find_package(LLVM 12.0 QUIET CONFIG)
+        if(NOT LLVM_FOUND)
+            find_package(LLVM REQUIRED CONFIG)
+        endif()
+    endif()
 
     set(test_sources ${test_sources}
         ContractionLibraryLoading_test.cpp

diff --git a/HostLibraryTests/CachingLibrary_test.cpp b/HostLibraryTests/CachingLibrary_test.cpp
@@ -212,7 +212,8 @@ TEST(Hashing, AMDGPU)
     std::vector<AMDGPU::Processor> processors{AMDGPU::Processor::gfx803,
                                               AMDGPU::Processor::gfx900,
                                               AMDGPU::Processor::gfx906,
-                                              AMDGPU::Processor::gfx908};
+                                              AMDGPU::Processor::gfx908,
+                                              AMDGPU::Processor::gfx90a};
 
     std::vector<int> counts{16, 20, 40, 56, 60, 64};