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cpu/rpx0xx: add periph_usbus support #20817

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cpu/rpx0xx: add periph_usbus support #20817

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7e8a004
cpu/rpxx0xx: add periph_usbus support
fengelhardt Aug 18, 2024
40ceaaa
fixup! cpu/rpxx0xx: add periph_usbus support
fengelhardt Aug 31, 2024
a37688e
fixup! fixup! cpu/rpxx0xx: add periph_usbus support
fengelhardt Sep 1, 2024
a178b9f
fixup! cpu/rpxx0xx: add periph_usbus support
fengelhardt Sep 12, 2024
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1 change: 1 addition & 0 deletions cpu/rpx0xx/Makefile.features
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Original file line number Diff line number Diff line change
Expand Up @@ -9,4 +9,5 @@ FEATURES_PROVIDED += periph_pio
FEATURES_PROVIDED += periph_timer_periodic
FEATURES_PROVIDED += periph_uart_reconfigure
FEATURES_PROVIDED += periph_uart_modecfg
FEATURES_PROVIDED += periph_usbdev
FEATURES_PROVIDED += pio_i2c
8 changes: 8 additions & 0 deletions cpu/rpx0xx/clock.c
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Expand Up @@ -130,6 +130,14 @@ void clock_periph_configure(CLOCKS_CLK_PERI_CTRL_AUXSRC_Enum aux)
io_reg_atomic_set(&CLOCKS->CLK_PERI_CTRL, (1u << CLOCKS_CLK_PERI_CTRL_ENABLE_Pos));
}

void clock_usb_configure(CLOCKS_CLK_USB_CTRL_AUXSRC_Enum aux)
{
io_reg_atomic_clear(&CLOCKS->CLK_USB_CTRL, (1u << CLOCKS_CLK_USB_CTRL_ENABLE_Pos));
io_reg_write_dont_corrupt(&CLOCKS->CLK_USB_CTRL, aux << CLOCKS_CLK_USB_CTRL_AUXSRC_Pos,
CLOCKS_CLK_USB_CTRL_AUXSRC_Msk);
io_reg_atomic_set(&CLOCKS->CLK_USB_CTRL, (1u << CLOCKS_CLK_USB_CTRL_ENABLE_Pos));
}

void clock_gpout0_configure(uint32_t f_in, uint32_t f_out, CLOCKS_CLK_GPOUT0_CTRL_AUXSRC_Enum aux)
{
assert(f_out <= f_in);
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11 changes: 9 additions & 2 deletions cpu/rpx0xx/cpu.c
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Original file line number Diff line number Diff line change
Expand Up @@ -66,6 +66,11 @@ static void _cpu_reset(void)
pll_reset_sys();
/* start the system PLL (typically takes the 12 MHz XOSC to generate 125 MHz) */
pll_start_sys(PLL_SYS_REF_DIV, PLL_SYS_VCO_FEEDBACK_SCALE, PLL_SYS_POSTDIV1, PLL_SYS_POSTDIV2);
/* start usb PLL if necessary */
if (IS_USED(MODULE_USBUS) || IS_USED(MODULE_PERIPH_ADC)) {
pll_start_usb(PLL_USB_REF_DIV, PLL_USB_VCO_FEEDBACK_SCALE,
PLL_USB_POSTDIV1, PLL_USB_POSTDIV2);
}
/* configure reference clock to run from XOSC (typically 12 MHz) */
clock_ref_configure_source(CLOCK_XOSC, CLOCK_XOSC,
CLOCKS_CLK_REF_CTRL_SRC_xosc_clksrc);
Expand All @@ -74,6 +79,10 @@ static void _cpu_reset(void)
CLOCKS_CLK_SYS_CTRL_AUXSRC_clksrc_pll_sys);
/* configure the peripheral clock to run from the system clock */
clock_periph_configure(CLOCK_PERIPH_SOURCE);
/* configure the usb clock */
if (IS_USED(MODULE_USBUS)) {
clock_usb_configure(CLOCKS_CLK_USB_CTRL_AUXSRC_clksrc_pll_usb);
}
if (IS_USED(ENABLE_DEBUG)) {
/* check clk_ref with logic analyzer */
clock_gpout0_configure(CLOCK_XOSC, CLOCK_XOSC,
Expand All @@ -82,8 +91,6 @@ static void _cpu_reset(void)

/* Configure USB PLL to deliver 48MHz needed by ADC */
if (IS_USED(MODULE_PERIPH_ADC)) {
pll_start_usb(PLL_USB_REF_DIV, PLL_USB_VCO_FEEDBACK_SCALE,
PLL_USB_POSTDIV1, PLL_USB_POSTDIV2);
clock_adc_configure(CLOCKS_CLK_ADC_CTRL_AUXSRC_clksrc_pll_usb);
}
}
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8 changes: 8 additions & 0 deletions cpu/rpx0xx/include/periph_cpu.h
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Expand Up @@ -621,6 +621,14 @@ void clock_ref_configure_aux_source(uint32_t f_in, uint32_t f_out,
*/
void clock_periph_configure(CLOCKS_CLK_PERI_CTRL_AUXSRC_Enum aux);

/**
* @brief Configure the usb clock to run from a dedicated auxiliary
* clock source
*
* @param aux Auxiliary clock source
*/
void clock_usb_configure(CLOCKS_CLK_USB_CTRL_AUXSRC_Enum aux);

/**
* @brief Configure gpio21 as clock output pin
*
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