Hardware-Design-Lab

This repo is "NTHU Hardware Design & Lab" course project.

FPGA Design Enviroment

Xilinx Vivado & Basys3 Demo Board

Lab1 1-bit and 4-bit ALU

Use combinational circuit to module a Arithmetic Logic Unit (ALU).
    ●Lab1_1: use structural modeling to module a 1-bit ALU
    ●Lab1_2: use data flow modeling to module a 1-bit ALU
    ●Lab1_3: use behavioral modeling to module a 1-bit ALU
    ●Lab1_4: cascade 4 of 1-bit ALU to module 4-bit ALU

Lab2 1-digit BCD Counter

Use sequential circuit to module a 1-digit BCD counter.
    ●Lab2_1: use combinational circuit to convert 1-digit BCD number to its next/previous BCD number
    ●Lab2_2: write a testbench to verify Lab2_1
    ●Lab2_3: use sequential circuit to design 1-digit BCD counter

Lab3 Clock Divider and LED Controller

Module your design on FPGA demo board to control the LEDs as requirement
    ●Lab3_1: module a LED controller as requirement
    ●Lab3_2: rewrite Lab3_1 by adding a speed selection signal to speed up/down the light frequency

Lab4 BCD and Pingpong Counters

Module a BCD/Pingpong counter on FPGA demo board to control the 7-segment display as requirement
    ●Lab4_1: module Lab2_2 to the FPGA on demo board
    ●Lab4_2: extend Lab4_1 from 1-digit to 2-digit
    ●Lab4_1: module a 2-digit pingpong counter to the FPGA on demo board

Lab5 Ticket Machine

Module a controller for a ticket machine on FPGA demo board as requirement