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Pull requests: OpenXiangShan/XiangShan
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Fix vld final resp
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#3763
opened Oct 17, 2024 by
xiaofeibao-xjtu
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fix(Rab): no need to limit diff commit valid only assert in commit state
#3760
opened Oct 17, 2024 by
huxuan0307
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submodule, timing(CoupledL2):all outputs should be registered
#3756
opened Oct 16, 2024 by
linjuanZ
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fix(csr): fix interrupt code use xtopi.IID replace instread of xip & xie
#3753
opened Oct 16, 2024 by
sinceforYy
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fix(FuUnit, clkgate): use fu.io.in/out.fire control its clock gate enable signal
#3751
opened Oct 16, 2024 by
sinceforYy
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timing(MemBlock): fix MemBlock inner timing
timing
Fix bad timing
#3748
opened Oct 16, 2024 by
cz4e
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Opt wakeup and cancel logic and loadDependency timing
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#3737
opened Oct 15, 2024 by
sinsanction
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refactor(fpu): remove dependencies on fudian and remove invalid files
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#3727
opened Oct 14, 2024 by
HeiHuDie
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feat(AXI4Memory): add support for WRAP burst mode, and fix a bug
#3726
opened Oct 13, 2024 by
eeeeewwz
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fix(zcb): fix ill insn check for zcb arith insn
#3721
opened Oct 12, 2024 by
TheKiteRunner24
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feat(ittage): Reuse always_taken to mark the first occurrence of the jalr inst
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#3718
opened Oct 11, 2024 by
sleep-zzz
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power(MemBlock): add static clock gated (tmp Branch for Test)
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power
about power design or optimization
submodule(ready-to-run): bump nemu ref
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#3713
opened Oct 11, 2024 by
NewPaulWalker
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fix(PTW, RVH): add the high bits check of the first s2xlate when the req is allstage
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#3681
opened Sep 29, 2024 by
pxk27
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fix(PTW, RVH): modify the logic of checking high bits of gpaddr
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#3679
opened Sep 29, 2024 by
pxk27
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feat(SoC): Replace DummyLLC with OpenLLC+OpenNCB in KunminghuV2Config
#3672
opened Sep 27, 2024 by
sumailyyc
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bpu: Optimize CGE of bpu/previous_s2_*
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#3670
opened Sep 27, 2024 by
Lawrence-ID
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