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Fixed review comment
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@Shaibal-Microsoft
Shaibal-Microsoft committed Mar 6, 2025
1 parent d70cdd6 commit 1b4b886
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Showing 3 changed files with 44 additions and 67 deletions.
62 changes: 27 additions & 35 deletions examples/rt685s-evk/src/bin/flexspi-storage-service.rs
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Original file line number Diff line number Diff line change
@@ -1,51 +1,33 @@
#![no_std]
#![no_main]

use defmt::{assert, info};
use embassy_executor::Spawner;
use embassy_imxrt::flexspi_nor_storage_bus::{
AhbConfig, FlexSpiBusWidth, FlexSpiFlashPort, FlexSpiFlashPortDeviceInstance, FlexspiAhbBufferConfig,
FlexspiAhbWriteWaitUnit, FlexspiConfig, FlexspiCsIntervalCycleUnit, FlexspiDeviceConfig, FlexspiNorStorageBus,
FlexspiReadSampleClock,
};
use embassy_imxrt::spi_nor_storage_bus::SpiNorStorageBus;
use embassy_imxrt::storage::{
BlockingNorStorageDriver, ConfigureCmdSeq, NorStorageCmd, NorStorageCmdMode, NorStorageCmdSeq, NorStorageCmdType,
BlockingNorStorageDriver, NorStorageCmd, NorStorageCmdMode, NorStorageCmdSeq, NorStorageCmdType,
};
use embassy_time::Timer;
use embedded_storage::nor_flash::{NorFlash as BlockingNorFlash, ReadNorFlash as BlockingReadNorFlash};
use {defmt_rtt as _, panic_probe as _};

static ADDR: u32 = 0x2F000;
static ADDR: u32 = 0x2000;

struct MacronixDeviceDriver {
struct MacronixDeviceDriver<T: BlockingNorStorageDriver> {
// Bus driver dependency
spi_nor_storage_bus: Option<SpiNorStorageBus<embassy_imxrt::spi_nor_storage_bus::Blocking>>,
flexspi_nor_storage_bus: Option<FlexspiNorStorageBus<embassy_imxrt::flexspi_nor_storage_bus::Blocking>>,
storagebusdriver: T,
}

impl MacronixDeviceDriver {
pub fn new(
spidriver: Option<SpiNorStorageBus<embassy_imxrt::spi_nor_storage_bus::Blocking>>,
flexspidriver: Option<FlexspiNorStorageBus<embassy_imxrt::flexspi_nor_storage_bus::Blocking>>,
) -> Result<Self, ()> {
if let Some(spi) = spidriver {
return Ok(MacronixDeviceDriver {
spi_nor_storage_bus: Some(spi),
flexspi_nor_storage_bus: None,
});
};
if let Some(flexspi) = flexspidriver {
return Ok(MacronixDeviceDriver {
spi_nor_storage_bus: None,
flexspi_nor_storage_bus: Some(flexspi),
});
}

Err(())
impl<T: BlockingNorStorageDriver> MacronixDeviceDriver<T> {
pub fn new(storagebusdriver: T) -> Result<Self, ()> {
Ok(Self { storagebusdriver })
}

pub fn init(&self) {
let bus_ref = self.flexspi_nor_storage_bus.as_ref().unwrap();
let bus_ref = &self.storagebusdriver;
let cmdarr = NorStorageCmdSeq {
fast_read: Some(NorStorageCmd {
cmd_lb: 0xEE,
Expand Down Expand Up @@ -112,13 +94,13 @@ impl MacronixDeviceDriver {
}

pub fn read(&mut self, addr: u32, data: &mut [u8]) {
let bus_ref = self.flexspi_nor_storage_bus.as_mut().unwrap();
let bus_ref = &mut self.storagebusdriver;
// Read data from the storage device
bus_ref.read(addr as u32, data);
}

pub fn write(&mut self, addr: u32, data: &[u8]) {
let bus_ref = self.flexspi_nor_storage_bus.as_mut().unwrap();
let bus_ref = &mut self.storagebusdriver;
// Write data to the storage device
bus_ref.write_enable();

Expand Down Expand Up @@ -220,21 +202,31 @@ async fn main(_spawner: Spawner) {
FlexSpiFlashPortDeviceInstance::DeviceInstance0, // FlexSPI device instance
);

flexspi_storage.configport.configure_flexspi(&flexspi_config); // Configure the Flexspi controller
// flexspi_storage.configport.configure_flexspi(&flexspi_config); // Configure the Flexspi controller

flexspi_storage
.configport
.configure_flexspi_device(&flash_config, &flexspi_config); // Configure the Flash device specific parameters like CS time, etc
// flexspi_storage
// .configport
// .configure_flexspi_device(&flash_config, &flexspi_config); // Configure the Flash device specific parameters like CS time, etc

// Instanctiate the storage device driver and inject the bus driver dependency
let mut device_driver = MacronixDeviceDriver::new(None, Some(flexspi_storage)).unwrap();
let mut device_driver = MacronixDeviceDriver::new(flexspi_storage).unwrap();
device_driver.init();

// write data
device_driver.write(ADDR, &write_data);
// device_driver.write(ADDR, &write_data);

info!("Array before reading");
for i in 0..5 {
info!("data[{}]: {}", i, read_data[i]);
}
device_driver.read(ADDR, &mut read_data);

info!("Array after reading");

for i in 0..5 {
info!("data[{}]: {}", i, read_data[i]);
}

loop {
Timer::after_millis(2000).await;
}
Expand Down
46 changes: 14 additions & 32 deletions src/flexspi_nor_storage_bus.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -503,14 +503,15 @@ impl FlexSpiError {

impl BlockingReadNorFlash for FlexspiNorStorageBus<Blocking> {
const READ_SIZE: usize = 1;
#[no_mangle]
#[link_section = ".flexspi_code"]
fn read(&mut self, offset: u32, bytes: &mut [u8]) -> Result<(), Self::Error> {
let offset = 0x08000000 + offset;
let ptr = offset as *const u8;
unsafe {
let data = *ptr;
bytes[0] = data;
let mut ptr = offset as *const u8;

for data in bytes.iter_mut() {
unsafe {
*data = *ptr;
ptr = ptr.add(1);
}
}
Ok(())
}
Expand All @@ -536,26 +537,6 @@ impl BlockingReadNorFlash for FlexspiNorStorageBus<Blocking> {
}
}

impl FlexspiNorStorageBus<Blocking> {
#[no_mangle]
#[link_section = ".flexspi_code"]
fn setup_write_transfer(&mut self) {
self.flexspi_ref.LUTKEY = 0x5AF05AF0;
self.flexspi_ref.LUTCR = 0x00000001;

let cmd_idx: usize = FlexSpiCmd::PageProgram.into();
self.flexspi_ref.FLSHCR2[2] &= !(0x1f << 8);
self.flexspi_ref.FLSHCR2[2] |= (cmd_idx as u32) << 8;

self.flexspi_ref.LUT[cmd_idx * LUT_NUM_REG_PER_SEQ] =
flexspi_lut_seq(CMD_DDR, Octal, 0x12, CMD_DDR, Octal, 0xED);
self.flexspi_ref.LUT[cmd_idx * LUT_NUM_REG_PER_SEQ + 1] =
flexspi_lut_seq(RADDR_DDR, Octal, 0x20, WRITE_DDR, Octal, 0x04);
self.flexspi_ref.LUT[cmd_idx * LUT_NUM_REG_PER_SEQ + 2] = 0;
self.flexspi_ref.LUT[cmd_idx * LUT_NUM_REG_PER_SEQ + 3] = 0;
}
}

impl BlockingNorFlash for FlexspiNorStorageBus<Blocking> {
const WRITE_SIZE: usize = 1;
const ERASE_SIZE: usize = 4096;
Expand All @@ -578,7 +559,6 @@ impl BlockingNorFlash for FlexspiNorStorageBus<Blocking> {
fn write(&mut self, offset: u32, bytes: &[u8]) -> Result<(), Self::Error> {
let addr = 0x08000000 + offset;
let ptr = addr as *mut u8;
self.setup_write_transfer();
unsafe {
*ptr = bytes[0];
}
Expand All @@ -598,19 +578,19 @@ impl BlockingNorFlash for FlexspiNorStorageBus<Blocking> {

impl crate::storage::BlockingNorStorageDriver for FlexspiNorStorageBus<Blocking> {
fn lock(&self) -> Result<(), Self::Error> {
// Lock the FlexSPI
// TODO: Lock the FlexSPI
Ok(())
}
fn unlock(&self) -> Result<(), Self::Error> {
// Unlock the FlexSPI
// TODO: Unlock the FlexSPI
Ok(())
}
fn power_down(&self) -> Result<(), Self::Error> {
// Power down the FlexSPI
// TODO: Power down the FlexSPI
Ok(())
}
fn power_up(&self) -> Result<(), Self::Error> {
// Power up the FlexSPI
// TODO: Power up the FlexSPI
Ok(())
}
fn write_enable(&mut self) -> Result<(), Self::Error> {
Expand All @@ -620,9 +600,11 @@ impl crate::storage::BlockingNorStorageDriver for FlexspiNorStorageBus<Blocking>
Ok(())
}
fn write_disable(&mut self) -> Result<(), Self::Error> {
//TODO: Implement write disable
Ok(())
}
fn read_jedec_id(&self) -> Result<[u8; 3], Self::Error> {
// TODO: Read JEDEC ID
Ok([0, 0, 0])
}
fn read_status_reg(&mut self) -> Result<[u8; 4], Self::Error> {
Expand All @@ -642,7 +624,7 @@ impl<M: Mode> crate::storage::ConfigureCmdSeq for FlexspiNorStorageBus<M> {
}

impl FlexspiNorStorageBus<Blocking> {
fn setup_ip_transfer(&mut self, cmd: FlexSpiCmd, addr: Option<u32>, data: Option<u32>, size: Option<u32>) {
fn setup_ip_transfer(&mut self, cmd: FlexSpiCmd, addr: Option<u32>, _data: Option<u32>, _size: Option<u32>) {
match addr {
Some(addr) => {
self.flexspi_ref.IPCR0 = addr;
Expand Down
3 changes: 3 additions & 0 deletions src/spi_nor_storage_bus.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -129,5 +129,8 @@ impl SpiNorStorageBus<Blocking> {
info,
phantom: core::marker::PhantomData,
}

// Program the capacity either locally or in some register
// We can also read the flash device register to read size
}
}

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