Fix: the reserved bits in the Mode field of m/stvec #154
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See issue #153
Explanation: When setting the value of the MODE field, the reserved bit (bit 1) should be cleared to zero. When reading the BASE field, the lowest bit (bit 0) of the MODE segment should be cleared to zero. This approach prevents writing to undefined MODE values and also ensures that the BASE field is four-byte aligned. Previously, neither of these requirements was satisfied.