Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

riscv: plat-virt: Let CFG_RISCV_PLIC be build time configurable #7278

Merged
merged 1 commit into from
Feb 18, 2025

Conversation

gagachang
Copy link
Contributor

RISC-V has several standard interrupt controllers supported by QEMU virtual platform. For example: PLIC, APLIC, IMSIC, etc.
This commit removes enforcement of CFG_RISCV_PLIC so that CFG_RISCV_PLIC can be build time configurable for developer.

Copy link
Contributor

@jforissier jforissier left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Acked-by: Jerome Forissier <[email protected]>

@peterlin-sifive
Copy link

Reviewed-by: Yu-Chien Peter Lin <[email protected]>

RISC-V has several standard interrupt controllers supported by QEMU
virtual platform. Thus, we allow CFG_RISCV_PLIC to be overridden at
build time while keeping the default value enabled.

Signed-off-by: Alvin Chang <[email protected]>
Reviewed-by: Yu-Chien Peter Lin <[email protected]>
Acked-by: Jerome Forissier <[email protected]>
@gagachang gagachang force-pushed the dev-riscv-disable-plic branch from 6e72680 to 6f351b6 Compare February 18, 2025 05:13
@gagachang
Copy link
Contributor Author

Tags applied. Thanks!

@jforissier jforissier merged commit 47a61ff into OP-TEE:master Feb 18, 2025
11 checks passed
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

3 participants