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plat-versal: add support for the Versal Net variant #6738

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@jcorbier jcorbier commented Mar 5, 2024

This series upgrades the AMD/Xilinx port with the following:

  • Add support for a new SoC in the Versal family
  • Add a hardware crypto accelerator driver for this specific SoC
  • Fixes for more recent versions of the Xilinx software environment (PLM APIs have changed in 2023)

Versal Net is a new SoC flavor based on the Versal architecture. This
commit introduces it in versal platform code.

Signed-off-by: Jeremie Corbier <[email protected]>
Make it more generic and still provide a default IPI channel to the PMC
for the other drivers.

Signed-off-by: Jeremie Corbier <[email protected]>
PLM HWRNG driver cannot provide more than 32 bytes of entropy at a time.
Split bigger requests into 32 bytes chunks.

Signed-off-by: Jeremie Corbier <[email protected]>
The Versal Net variant comes with a dedicated PKI engine. This driver
makes use of the engine for ECDSA P-256, P-384, and P-521 sign, verify
and key generation operations.

Signed-off-by: Jeremie Corbier <[email protected]>
The original HUK driver generated the HUK using SHA-256. This commit
replaces this mechanism with the more robust HKDF-SHA256.

Signed-off-by: Jeremie Corbier <[email protected]>
Add simple PTA allowing to dynamically load data in the Versal PL.

Signed-off-by: Jeremie Corbier <[email protected]>
 - update crypto API IDs
 - update calls to the KAT subsystem

Signed-off-by: Jeremie Corbier <[email protected]>
The XilNvm API has heavily changed between Versal and Versal
Net. This commit adds support for the Net variant.

Signed-off-by: Jeremie Corbier <[email protected]>
XilSecure has been updated to pack the public exponent right after the
modulus rather than at a fixed 512 bytes (RSA 4096 key size) offset. See
commit below for more details:

Xilinx/embeddedsw@c2dd2eb

Signed-off-by: Jeremie Corbier <[email protected]>
@ldts
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ldts commented Mar 6, 2024

thanks @jcorbier

I need to ask that the changes to support the more recent AMD/Xilinx tools maintain backwards compatibility. We should be able to query the ABI at runtime - maybe even propose whatever is needed to AMD/Xilinx https://github.com/Xilinx/embeddedsw .

I'd like to understand as well the level of testing that has been done with this software (just the output of xtest, to check if you encountered any regressions (ie this is the changelog for 4.1.0 #6574 (comment) ).

Thirdly is there anything that you also plan on posting to https://github.com/OP-TEE/optee_docs ?

@jcorbier
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jcorbier commented Mar 6, 2024

Thanks @ldts for your feedback.

I need to ask that the changes to support the more recent AMD/Xilinx tools maintain backwards compatibility. We should be able to query the ABI at runtime - maybe even propose whatever is needed to AMD/Xilinx https://github.com/Xilinx/embeddedsw .

Noted. Let me see how best we can implement that.

I'd like to understand as well the level of testing that has been done with this software (just the output of xtest, to check if you encountered any regressions (ie this is the changelog for 4.1.0 #6574 (comment) ).

I don't have access to the logs right now but the current state is the same as for Versal in 4.1.0.

Thirdly is there anything that you also plan on posting to https://github.com/OP-TEE/optee_docs ?

Yes, a working version is available here https://github.com/ProvenRun/optee_docs/tree/versal_net_port
It needs some additional work before I create a pull request for it though.

Same thing for build and manifest repositories.

@ldts
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ldts commented Mar 8, 2024

we should split the drivers (rng/nvm) into a different files (versal_net_rng, versal_net_nvm?)

@jcorbier
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jcorbier commented Mar 8, 2024

we should split the drivers (rng/nvm) into a different files (versal_net_rng, versal_net_nvm?)

Agreed, the initial thinking for the current implementation was to avoid as much code duplication as possible between versal and versal_net but in the end it makes things much more complicated than needed.

@nathan-menhorn
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Hi @jcorbier any updates on this PR?

@jcorbier
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Hi @jcorbier any updates on this PR?

Hi @nathan-menhorn, still working out the details of what needs to be done to properly split versal/versal-net code, including the TRNG update. I'll try and push an update to this PR by end of this week.

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core/pta/versal/fpga_pta.c Outdated Show resolved Hide resolved
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@ldts
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ldts commented Mar 31, 2024

@etienne-lms could you hold your comments until the patchset is updated please?

There are a couple of functional changes that need addressing first

  1. ABI runtime detection (not only to support the older toolchain but also to be covered for changes in the future)
  2. use different files for Versal net instead of conditional macros (since some drivers are radically different).

So I suggest we wait for that before we go into details (ie default configs, coding standards and so on) as some files will change quite a bit

Split NVM code into two seperate drivers, one for Versal, one for Versal
Net, since both variants have very different NVM PLM code.

Signed-off-by: Jeremie Corbier <[email protected]>
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jcorbier commented Apr 2, 2024

@etienne-lms could you hold your comments until the patchset is updated please?

Indeed, I'll be pusing fixup commits in the coming hours/days.

 - Do not enable RPMB configs on Versal
 - Do not modify Versal IPI ID
 - Do not enable FPGA PTA on Versal

Signed-off-by: Jeremie Corbier <[email protected]>
 - s!invokeCommandEntryPoint!invoke_command!
 - Return TEE_ERROR_NOT_SUPPORTED rather than BAD_PARAMS in case an
   invalid command ID is used
 - Re-order includes as requested

Signed-off-by: Jeremie Corbier <[email protected]>
 - Add timeout in case the remote processor is unresponsive
 - versal_mbox_free explicitely sets the pointer to NULL

Signed-off-by: Jeremie Corbier <[email protected]>
core/drivers/crypto/versal/ecc.c Outdated Show resolved Hide resolved
core/drivers/crypto/versal/ecc.c Outdated Show resolved Hide resolved
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core/drivers/versal_net_nvm.c Outdated Show resolved Hide resolved
core/drivers/versal_net_nvm.c Outdated Show resolved Hide resolved
core/drivers/versal_net_nvm.c Outdated Show resolved Hide resolved
#define VERSAL_PM_MAJOR 0
#define VERSAL_PM_MINOR 1
#define VERSAL_PM_MAJOR 1
#define VERSAL_PM_MINOR 0
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Deserves a specific commit IMHO.

core/drivers/crypto/versal/authenc.c Show resolved Hide resolved
No need for all the different error labels.

Signed-off-by: Jeremie Corbier <[email protected]>
@nathan-menhorn
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Hi @jcorbier what's the current status of this PR? Thanks.

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Hi @jcorbier any updates on this PR? Are patches to address all the comments in the PR still estimated to come by the end of the month? Thanks.

@github-actions github-actions bot added the Stale label Jul 29, 2024
@nathan-menhorn
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Hi @jcorbier what's the status of this PR? Last we discussed updates were supposed to be pushed a few weeks ago? Thanks.

@github-actions github-actions bot removed the Stale label Jul 30, 2024
 - Make the check stricter ; major and minor versions should match
 - Fix supported Versal PM version (1.0 rather than 0.1)

Signed-off-by: Jeremie Corbier <[email protected]>
There were cases whe the ephemeral key needed to perform ECDSA
signatures was not properly free'd in case an error happened during the
process.

Signed-off-by: Jeremie Corbier <[email protected]>
core/arch/arm/plat-versal/conf.mk Outdated Show resolved Hide resolved
core/drivers/crypto/versal/authenc.c Outdated Show resolved Hide resolved
core/drivers/crypto/versal/ecc.c Show resolved Hide resolved
core/drivers/crypto/versal/ecc.c Outdated Show resolved Hide resolved
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ldts commented Aug 22, 2024

@jcorbier do you plan on folding the commits as per the initial patch-set for further review? I can then have a a better look - last time I checked I found a simple regression (easy to fix).

Also I was testing the Xen hypervisor with the tip of OP-TEE on the vck190 evaluation kit and I found it to be broken. I was wondering if this is a configuration (optee+xen on Versal) that you have tested? I believe probably nobody has yet (@nathan-menhorn ?)

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Hi @ldts no testing has been performed on Xen+optee yet as there haven't been any customers requests.

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@jcorbier @ldts @etienne-lms just keeping this PR alive. We should be expecting some input from @jcorbier soon.

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@jcorbier do you plan on folding the commits as per the initial patch-set for further review? I can then have a a better look - last time I checked I found a simple regression (easy to fix).

Yes, there a couple more things I want to fix then I'll force push a clean patchset to clean up the current fixup commits mess.

@@ -994,8 +1010,16 @@ TEE_Result versal_efuse_write_revoke_ppk(enum versal_nvm_ppk_type type)
return versal_efuse_write_misc(&misc_ctrl);
}

/*
* versal_efuse_write_revoke_id expects an efuse identifier between
* 1 and 256.

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@jcorbier 0 to 255

TEE_Result versal_efuse_write_revoke_id(uint32_t id)
{
if ((id < VERSAL_NET_REVOKE_EFUSE_MIN) ||

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@jcorbier check should be between 0 and 255.

I'm not sure why the AMD software was implemented this way as this is very confusing and it doesn't match the OFFCHIP_REVOKE function, which expects values from 1 - 256, but this function expects values from 0 to 255

See the error handling of
https://github.com/Xilinx/embeddedsw/blob/master/lib/sw_services/xilnvm/src/versal_net/server/xnvm_efuse.c#L615C21-L617
compared to
https://github.com/Xilinx/embeddedsw/blob/master/lib/sw_services/xilnvm/src/versal_net/server/xnvm_efuse.c#L701-L703

@@ -1012,12 +1014,12 @@ TEE_Result versal_efuse_write_revoke_ppk(enum versal_nvm_ppk_type type)

/*
* versal_efuse_write_revoke_id expects an efuse identifier between
* 1 and 256.
* 1 and 256.

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0 - 255

Comment on lines +1021 to +1022
if (id < VERSAL_NET_REVOKE_EFUSE_MIN ||
id > VERSAL_NET_REVOKE_EFUSE_MAX)

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@jcorbier checks needs to be between 0 and 255 for this function.

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5 participants