riscv: plat-virt: allow enabling CFG_TEE_CORE_DEBUG for virt machine

Allow enabling CFG_TEE_CORE_DEBUG to make assertions useful. Signed-off-by: Yu Chien Peter Lin <[email protected]> Reviewed-by: Alvin Chang <[email protected]> Tested-by: Alvin Chang <[email protected]>
OP-TEE · Sep 9, 2024 · f27f728 · f27f728
1 parent 042daec
commit f27f728
Showing 1 changed file with 0 additions and 1 deletion.
diff --git a/core/arch/riscv/plat-virt/conf.mk b/core/arch/riscv/plat-virt/conf.mk
@@ -5,7 +5,6 @@ $(call force,CFG_RISCV_ISA_C,y)
 $(call force,CFG_RISCV_FPU,y)
 
 $(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
-$(call force,CFG_TEE_CORE_DEBUG,n)
 $(call force,CFG_CORE_RESERVED_SHM,n)
 $(call force,CFG_CORE_DYN_SHM,y)