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Add RISC-V exception handler for MARS kernel #1247
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…el responsible for stvec initialization. Halt simulator if PC == 0
Codecov Report
@@ Coverage Diff @@
## master #1247 +/- ##
=======================================
Coverage 99.42% 99.42%
=======================================
Files 133 133
Lines 10687 10687
=======================================
Hits 10626 10626
Misses 61 61 Continue to review full report at Codecov.
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pavelkryukov
suggested changes
Mar 2, 2020
pavelkryukov
reviewed
Mar 4, 2020
pavelkryukov
suggested changes
Mar 4, 2020
pavelkryukov
reviewed
Mar 4, 2020
pavelkryukov
reviewed
Mar 4, 2020
pavelkryukov
reviewed
Mar 4, 2020
pavelkryukov
reviewed
Mar 4, 2020
pavelkryukov
suggested changes
Mar 4, 2020
pavelkryukov
suggested changes
Mar 5, 2020
Once you address code review feedback, please pull master branch into your fork. |
pavelkryukov
reviewed
Mar 5, 2020
pavelkryukov
approved these changes
Mar 5, 2020
Strangely commit is attributed to me. I’ll fix it later today. |
pavelkryukov
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Mar 5, 2020
Done. |
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#1140