Add RISC-V exception handler for MARS Kernel

[pavelkryukov]

Currently our MARS kernel mode handles expections by loading MIPS32 code into memory.

mipt-mips/simulator/kernel/mars/mars_kernel.cpp

Line 234 in 49eb142

ElfLoader elf_loader( KERNEL_IMAGES "mars32_le.bin");

The MIPS32 code is generated from MARS Assembler:
https://github.com/MIPT-ILab/mipt-mips/blob/master/kernels/exceptions.s

Your goal is to re-write the exception handling code for RISC-V and load it depending on modeled ISA.

[pavelkryukov]

@exucutional Eric, could you please share your plan regarding this assignment?

[exucutional]

Firstly I'll write riscv-driver to handle traps in the same manner as mips-driver

class DriverRISCV32 : public Driver
{
public:
    explicit DriverRISCV32( Simulator* sim) : cpu( sim) { }
    Trap handle_trap( const Operation& instr) const final 
    {
        auto trap = instr.trap_type();
        if ( trap == Trap::NO_TRAP || trap == Trap::HALT)
            return trap;

        auto tvec = cpu->read_csr_register( "mtvec");
        cpu->write_csr_register( "mcause", ...);
        cpu->write_csr_register( "mepc", ...);
        cpu->set_pc( ...);
        return Trap( Trap::NO_TRAP);
    }
    std::unique_ptr<Driver> clone() const final { return std::make_unique<DriverRISCV32>( cpu); }
private:
    Simulator* const cpu;
};

Also I'll implement get_isa() method for

mipt-mips/simulator/simulator.h

Line 29 in 1ccc8f8

class CPUModel

to let MARS kernel knows connected simulator's isa.

What should the handler do? Without #920 it cannot even print information about exception. It can extract exception code, make some checks, clear CSRs and return.
After implementing RISC-V syscalls, the functionality of handler may be expanded.

[pavelkryukov]

Looks good.

Without #920 it cannot even print information about exception.

The idea is that we use MARS kernel and not RISC-V PK.
I/O will be handled by MARS kernel similarly to MIPS.

[pavelkryukov]

Firstly I'll write riscv-driver to handle traps in the same manner as mips-driver

I suggest to start with unit tests.
For MIPS, I had test binaries which I used to verify correctness — here they are likely to appear after the task completion.

[pavelkryukov]

Do I understand correctly the task is close to completion?

If yes, please provide an example of interactive RISC-V program (welcome message, input two numbers, print the sum – would be enough) and describe interfaces here: https://github.com/MIPT-ILab/mipt-mips/wiki/MARS-syscalls

[exucutional]

If yes, please provide an example of interactive RISC-V program

Where should I put the code?
Also I am trying to figure out where is the bug in performance simulator. Program works only with -f option.

Usually it indicates a bug in performance simulator
The different instructions are:	
Checker output: 0x1008c: {6}	addi $t1, $sp, 0	 [ $t1 = 0x1 ]
PerfSim output: 0x1008c: {6}	addi $t1, $sp, 0	 [ $t1 = 0x5 ]

[pavelkryukov]

where is the bug in performance simulato

Let's focus on functional simulation. I'll check performance simulation later.

[pavelkryukov]

Where should I put the code?

I think we may have a dedicated repo: https://github.com/MIPT-ILab/riscv-mars-examples

[pavelkryukov]

@exucutional I appreciate the way you completed this task, with good balance of independency, involvement, and quality. Please keep that level and do not forget to move forward!