This repository contains all the practice exercises completed using RARS (RISC-V Assembler and Runtime Simulator) for my Computer Architecture UNIT 2 course. 🎓
A collection of RISC-V assembly exercises focused on learning key concepts in computer architecture. These exercises aim to reinforce knowledge of assembly programming and the RISC-V architecture.
All exercises are written in RISC-V assembly and can be run using the RARS simulator.
Feel free to explore and contribute! 😄