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Updates tests to use issfon=1
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holm10 committed Dec 6, 2023
1 parent ba7f91f commit de49e28
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Showing 120 changed files with 60 additions and 60 deletions.
Binary file modified pytests/pytests/fulltests/nonog_d_c-fb_16x8/solution.h5
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Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ def test_reference(self, epsilon=1e-8):
# Then, we can import the UEDGE case setup
inputspec = importlib.util.spec_from_file_location("input", "input.py")
inputspec.loader.exec_module(importlib.util.module_from_spec(inputspec))
bbb.issfon=0
bbb.issfon=1
bbb.ftol=1e20
# For some reason fnrm still changes after 1 exmain, but not after 2
# Thus, assert a first exmain here
Expand Down
Binary file modified pytests/pytests/fulltests/nonog_d_c-fb_32x16/solution.h5
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Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ def test_reference(self, epsilon=1e-8):
# Then, we can import the UEDGE case setup
inputspec = importlib.util.spec_from_file_location("input", "input.py")
inputspec.loader.exec_module(importlib.util.module_from_spec(inputspec))
bbb.issfon=0
bbb.issfon=1
bbb.ftol=1e20
# For some reason fnrm still changes after 1 exmain, but not after 2
# Thus, assert a first exmain here
Expand Down
Binary file modified pytests/pytests/fulltests/nonog_d_c-fb_64x32/solution.h5
Binary file not shown.
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ def test_reference(self, epsilon=1e-8):
# Then, we can import the UEDGE case setup
inputspec = importlib.util.spec_from_file_location("input", "input.py")
inputspec.loader.exec_module(importlib.util.module_from_spec(inputspec))
bbb.issfon=0
bbb.issfon=1
bbb.ftol=1e20
# For some reason fnrm still changes after 1 exmain, but not after 2
# Thus, assert a first exmain here
Expand Down
Binary file modified pytests/pytests/unittests/D_only/nonog/0p5albedoc/solution.h5
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Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ def test_reference(self, epsilon=1e-8):
# Then, we can import the UEDGE case setup
inputspec = importlib.util.spec_from_file_location("input", "input.py")
inputspec.loader.exec_module(importlib.util.module_from_spec(inputspec))
bbb.issfon=0
bbb.issfon=1
bbb.ftol=1e20
# For some reason fnrm still changes after 1 exmain, but not after 2
# Thus, assert a first exmain here
Expand Down
Binary file modified pytests/pytests/unittests/D_only/nonog/bcee/solution.h5
Binary file not shown.
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ def test_reference(self, epsilon=1e-8):
# Then, we can import the UEDGE case setup
inputspec = importlib.util.spec_from_file_location("input", "input.py")
inputspec.loader.exec_module(importlib.util.module_from_spec(inputspec))
bbb.issfon=0
bbb.issfon=1
bbb.ftol=1e20
# For some reason fnrm still changes after 1 exmain, but not after 2
# Thus, assert a first exmain here
Expand Down
Binary file modified pytests/pytests/unittests/D_only/nonog/bcei/solution.h5
Binary file not shown.
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ def test_reference(self, epsilon=1e-8):
# Then, we can import the UEDGE case setup
inputspec = importlib.util.spec_from_file_location("input", "input.py")
inputspec.loader.exec_module(importlib.util.module_from_spec(inputspec))
bbb.issfon=0
bbb.issfon=1
bbb.ftol=1e20
# For some reason fnrm still changes after 1 exmain, but not after 2
# Thus, assert a first exmain here
Expand Down
Binary file not shown.
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ def test_reference(self, epsilon=1e-8):
# Then, we can import the UEDGE case setup
inputspec = importlib.util.spec_from_file_location("input", "input.py")
inputspec.loader.exec_module(importlib.util.module_from_spec(inputspec))
bbb.issfon=0
bbb.issfon=1
bbb.ftol=1e20
# For some reason fnrm still changes after 1 exmain, but not after 2
# Thus, assert a first exmain here
Expand Down
Binary file modified pytests/pytests/unittests/D_only/nonog/corepower/solution.h5
Binary file not shown.
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ def test_reference(self, epsilon=1e-8):
# Then, we can import the UEDGE case setup
inputspec = importlib.util.spec_from_file_location("input", "input.py")
inputspec.loader.exec_module(importlib.util.module_from_spec(inputspec))
bbb.issfon=0
bbb.issfon=1
bbb.ftol=1e20
# For some reason fnrm still changes after 1 exmain, but not after 2
# Thus, assert a first exmain here
Expand Down
Binary file modified pytests/pytests/unittests/D_only/nonog/curcore/solution.h5
Binary file not shown.
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ def test_reference(self, epsilon=1e-8):
# Then, we can import the UEDGE case setup
inputspec = importlib.util.spec_from_file_location("input", "input.py")
inputspec.loader.exec_module(importlib.util.module_from_spec(inputspec))
bbb.issfon=0
bbb.issfon=1
bbb.ftol=1e20
# For some reason fnrm still changes after 1 exmain, but not after 2
# Thus, assert a first exmain here
Expand Down
Binary file not shown.
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ def test_reference(self, epsilon=1e-8):
# Then, we can import the UEDGE case setup
inputspec = importlib.util.spec_from_file_location("input", "input.py")
inputspec.loader.exec_module(importlib.util.module_from_spec(inputspec))
bbb.issfon=0
bbb.issfon=1
bbb.ftol=1e20
# For some reason fnrm still changes after 1 exmain, but not after 2
# Thus, assert a first exmain here
Expand Down
Binary file not shown.
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ def test_reference(self, epsilon=1e-8):
# Then, we can import the UEDGE case setup
inputspec = importlib.util.spec_from_file_location("input", "input.py")
inputspec.loader.exec_module(importlib.util.module_from_spec(inputspec))
bbb.issfon=0
bbb.issfon=1
bbb.ftol=1e20
# For some reason fnrm still changes after 1 exmain, but not after 2
# Thus, assert a first exmain here
Expand Down
Binary file modified pytests/pytests/unittests/D_only/nonog/default/solution.h5
Binary file not shown.
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ def test_reference(self, epsilon=1e-8):
# Then, we can import the UEDGE case setup
inputspec = importlib.util.spec_from_file_location("input", "input.py")
inputspec.loader.exec_module(importlib.util.module_from_spec(inputspec))
bbb.issfon=0
bbb.issfon=1
bbb.ftol=1e20
# For some reason fnrm still changes after 1 exmain, but not after 2
# Thus, assert a first exmain here
Expand Down
Binary file modified pytests/pytests/unittests/D_only/nonog/fixedngcore/solution.h5
Binary file not shown.
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ def test_reference(self, epsilon=1e-8):
# Then, we can import the UEDGE case setup
inputspec = importlib.util.spec_from_file_location("input", "input.py")
inputspec.loader.exec_module(importlib.util.module_from_spec(inputspec))
bbb.issfon=0
bbb.issfon=1
bbb.ftol=1e20
# For some reason fnrm still changes after 1 exmain, but not after 2
# Thus, assert a first exmain here
Expand Down
Binary file modified pytests/pytests/unittests/D_only/nonog/fmiy0/solution.h5
Binary file not shown.
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ def test_reference(self, epsilon=1e-8):
# Then, we can import the UEDGE case setup
inputspec = importlib.util.spec_from_file_location("input", "input.py")
inputspec.loader.exec_module(importlib.util.module_from_spec(inputspec))
bbb.issfon=0
bbb.issfon=1
bbb.ftol=1e20
# For some reason fnrm still changes after 1 exmain, but not after 2
# Thus, assert a first exmain here
Expand Down
Binary file modified pytests/pytests/unittests/D_only/nonog/lzflux1e2/solution.h5
Binary file not shown.
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ def test_reference(self, epsilon=1e-8):
# Then, we can import the UEDGE case setup
inputspec = importlib.util.spec_from_file_location("input", "input.py")
inputspec.loader.exec_module(importlib.util.module_from_spec(inputspec))
bbb.issfon=0
bbb.issfon=1
bbb.ftol=1e20
# For some reason fnrm still changes after 1 exmain, but not after 2
# Thus, assert a first exmain here
Expand Down
Binary file modified pytests/pytests/unittests/D_only/nonog/newbcl/solution.h5
Binary file not shown.
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ def test_reference(self, epsilon=1e-8):
# Then, we can import the UEDGE case setup
inputspec = importlib.util.spec_from_file_location("input", "input.py")
inputspec.loader.exec_module(importlib.util.module_from_spec(inputspec))
bbb.issfon=0
bbb.issfon=1
bbb.ftol=1e20
# For some reason fnrm still changes after 1 exmain, but not after 2
# Thus, assert a first exmain here
Expand Down
Binary file not shown.
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ def test_reference(self, epsilon=1e-8):
# Then, we can import the UEDGE case setup
inputspec = importlib.util.spec_from_file_location("input", "input.py")
inputspec.loader.exec_module(importlib.util.module_from_spec(inputspec))
bbb.issfon=0
bbb.issfon=1
bbb.ftol=1e20
# For some reason fnrm still changes after 1 exmain, but not after 2
# Thus, assert a first exmain here
Expand Down
Binary file modified pytests/pytests/unittests/D_only/nonog/newbcr/solution.h5
Binary file not shown.
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ def test_reference(self, epsilon=1e-8):
# Then, we can import the UEDGE case setup
inputspec = importlib.util.spec_from_file_location("input", "input.py")
inputspec.loader.exec_module(importlib.util.module_from_spec(inputspec))
bbb.issfon=0
bbb.issfon=1
bbb.ftol=1e20
# For some reason fnrm still changes after 1 exmain, but not after 2
# Thus, assert a first exmain here
Expand Down
Binary file not shown.
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ def test_reference(self, epsilon=1e-8):
# Then, we can import the UEDGE case setup
inputspec = importlib.util.spec_from_file_location("input", "input.py")
inputspec.loader.exec_module(importlib.util.module_from_spec(inputspec))
bbb.issfon=0
bbb.issfon=1
bbb.ftol=1e20
# For some reason fnrm still changes after 1 exmain, but not after 2
# Thus, assert a first exmain here
Expand Down
Binary file not shown.
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ def test_reference(self, epsilon=1e-8):
# Then, we can import the UEDGE case setup
inputspec = importlib.util.spec_from_file_location("input", "input.py")
inputspec.loader.exec_module(importlib.util.module_from_spec(inputspec))
bbb.issfon=0
bbb.issfon=1
bbb.ftol=1e20
# For some reason fnrm still changes after 1 exmain, but not after 2
# Thus, assert a first exmain here
Expand Down
Binary file not shown.
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ def test_reference(self, epsilon=1e-8):
# Then, we can import the UEDGE case setup
inputspec = importlib.util.spec_from_file_location("input", "input.py")
inputspec.loader.exec_module(importlib.util.module_from_spec(inputspec))
bbb.issfon=0
bbb.issfon=1
bbb.ftol=1e20
# For some reason fnrm still changes after 1 exmain, but not after 2
# Thus, assert a first exmain here
Expand Down
Binary file modified pytests/pytests/unittests/D_only/nonog/recycmlb/solution.h5
Binary file not shown.
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ def test_reference(self, epsilon=1e-8):
# Then, we can import the UEDGE case setup
inputspec = importlib.util.spec_from_file_location("input", "input.py")
inputspec.loader.exec_module(importlib.util.module_from_spec(inputspec))
bbb.issfon=0
bbb.issfon=1
bbb.ftol=1e20
# For some reason fnrm still changes after 1 exmain, but not after 2
# Thus, assert a first exmain here
Expand Down
Binary file not shown.
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ def test_reference(self, epsilon=1e-8):
# Then, we can import the UEDGE case setup
inputspec = importlib.util.spec_from_file_location("input", "input.py")
inputspec.loader.exec_module(importlib.util.module_from_spec(inputspec))
bbb.issfon=0
bbb.issfon=1
bbb.ftol=1e20
# For some reason fnrm still changes after 1 exmain, but not after 2
# Thus, assert a first exmain here
Expand Down
Binary file not shown.
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ def test_reference(self, epsilon=1e-8):
# Then, we can import the UEDGE case setup
inputspec = importlib.util.spec_from_file_location("input", "input.py")
inputspec.loader.exec_module(importlib.util.module_from_spec(inputspec))
bbb.issfon=0
bbb.issfon=1
bbb.ftol=1e20
# For some reason fnrm still changes after 1 exmain, but not after 2
# Thus, assert a first exmain here
Expand Down
Binary file modified pytests/pytests/unittests/D_only/nonog/recycmrb/solution.h5
Binary file not shown.
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ def test_reference(self, epsilon=1e-8):
# Then, we can import the UEDGE case setup
inputspec = importlib.util.spec_from_file_location("input", "input.py")
inputspec.loader.exec_module(importlib.util.module_from_spec(inputspec))
bbb.issfon=0
bbb.issfon=1
bbb.ftol=1e20
# For some reason fnrm still changes after 1 exmain, but not after 2
# Thus, assert a first exmain here
Expand Down
Binary file not shown.
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ def test_reference(self, epsilon=1e-8):
# Then, we can import the UEDGE case setup
inputspec = importlib.util.spec_from_file_location("input", "input.py")
inputspec.loader.exec_module(importlib.util.module_from_spec(inputspec))
bbb.issfon=0
bbb.issfon=1
bbb.ftol=1e20
# For some reason fnrm still changes after 1 exmain, but not after 2
# Thus, assert a first exmain here
Expand Down
Binary file not shown.
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ def test_reference(self, epsilon=1e-8):
# Then, we can import the UEDGE case setup
inputspec = importlib.util.spec_from_file_location("input", "input.py")
inputspec.loader.exec_module(importlib.util.module_from_spec(inputspec))
bbb.issfon=0
bbb.issfon=1
bbb.ftol=1e20
# For some reason fnrm still changes after 1 exmain, but not after 2
# Thus, assert a first exmain here
Expand Down
Binary file not shown.
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ def test_reference(self, epsilon=1e-8):
# Then, we can import the UEDGE case setup
inputspec = importlib.util.spec_from_file_location("input", "input.py")
inputspec.loader.exec_module(importlib.util.module_from_spec(inputspec))
bbb.issfon=0
bbb.issfon=1
bbb.ftol=1e20
# For some reason fnrm still changes after 1 exmain, but not after 2
# Thus, assert a first exmain here
Expand Down
Binary file modified pytests/pytests/unittests/D_only/nonog/up_nogradient/solution.h5
Binary file not shown.
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ def test_reference(self, epsilon=1e-8):
# Then, we can import the UEDGE case setup
inputspec = importlib.util.spec_from_file_location("input", "input.py")
inputspec.loader.exec_module(importlib.util.module_from_spec(inputspec))
bbb.issfon=0
bbb.issfon=1
bbb.ftol=1e20
# For some reason fnrm still changes after 1 exmain, but not after 2
# Thus, assert a first exmain here
Expand Down
Binary file modified pytests/pytests/unittests/D_only/nonog/upcore1e3/solution.h5
Binary file not shown.
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ def test_reference(self, epsilon=1e-8):
# Then, we can import the UEDGE case setup
inputspec = importlib.util.spec_from_file_location("input", "input.py")
inputspec.loader.exec_module(importlib.util.module_from_spec(inputspec))
bbb.issfon=0
bbb.issfon=1
bbb.ftol=1e20
# For some reason fnrm still changes after 1 exmain, but not after 2
# Thus, assert a first exmain here
Expand Down
Binary file modified pytests/pytests/unittests/D_only/nonog/utorave/solution.h5
Binary file not shown.
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ def test_reference(self, epsilon=1e-8):
# Then, we can import the UEDGE case setup
inputspec = importlib.util.spec_from_file_location("input", "input.py")
inputspec.loader.exec_module(importlib.util.module_from_spec(inputspec))
bbb.issfon=0
bbb.issfon=1
bbb.ftol=1e20
# For some reason fnrm still changes after 1 exmain, but not after 2
# Thus, assert a first exmain here
Expand Down
Binary file modified pytests/pytests/unittests/D_only/ortho/0p5albedoc/solution.h5
Binary file not shown.
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ def test_reference(self, epsilon=1e-8):
# Then, we can import the UEDGE case setup
inputspec = importlib.util.spec_from_file_location("input", "input.py")
inputspec.loader.exec_module(importlib.util.module_from_spec(inputspec))
bbb.issfon=0
bbb.issfon=1
bbb.ftol=1e20
# For some reason fnrm still changes after 1 exmain, but not after 2
# Thus, assert a first exmain here
Expand Down
Binary file modified pytests/pytests/unittests/D_only/ortho/bcee/solution.h5
Binary file not shown.
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ def test_reference(self, epsilon=1e-8):
# Then, we can import the UEDGE case setup
inputspec = importlib.util.spec_from_file_location("input", "input.py")
inputspec.loader.exec_module(importlib.util.module_from_spec(inputspec))
bbb.issfon=0
bbb.issfon=1
bbb.ftol=1e20
# For some reason fnrm still changes after 1 exmain, but not after 2
# Thus, assert a first exmain here
Expand Down
Binary file modified pytests/pytests/unittests/D_only/ortho/bcei/solution.h5
Binary file not shown.
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ def test_reference(self, epsilon=1e-8):
# Then, we can import the UEDGE case setup
inputspec = importlib.util.spec_from_file_location("input", "input.py")
inputspec.loader.exec_module(importlib.util.module_from_spec(inputspec))
bbb.issfon=0
bbb.issfon=1
bbb.ftol=1e20
# For some reason fnrm still changes after 1 exmain, but not after 2
# Thus, assert a first exmain here
Expand Down
Binary file not shown.
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ def test_reference(self, epsilon=1e-8):
# Then, we can import the UEDGE case setup
inputspec = importlib.util.spec_from_file_location("input", "input.py")
inputspec.loader.exec_module(importlib.util.module_from_spec(inputspec))
bbb.issfon=0
bbb.issfon=1
bbb.ftol=1e20
# For some reason fnrm still changes after 1 exmain, but not after 2
# Thus, assert a first exmain here
Expand Down
Binary file modified pytests/pytests/unittests/D_only/ortho/corepower/solution.h5
Binary file not shown.
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ def test_reference(self, epsilon=1e-8):
# Then, we can import the UEDGE case setup
inputspec = importlib.util.spec_from_file_location("input", "input.py")
inputspec.loader.exec_module(importlib.util.module_from_spec(inputspec))
bbb.issfon=0
bbb.issfon=1
bbb.ftol=1e20
# For some reason fnrm still changes after 1 exmain, but not after 2
# Thus, assert a first exmain here
Expand Down
Binary file modified pytests/pytests/unittests/D_only/ortho/curcore/solution.h5
Binary file not shown.
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ def test_reference(self, epsilon=1e-8):
# Then, we can import the UEDGE case setup
inputspec = importlib.util.spec_from_file_location("input", "input.py")
inputspec.loader.exec_module(importlib.util.module_from_spec(inputspec))
bbb.issfon=0
bbb.issfon=1
bbb.ftol=1e20
# For some reason fnrm still changes after 1 exmain, but not after 2
# Thus, assert a first exmain here
Expand Down
Binary file not shown.
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ def test_reference(self, epsilon=1e-8):
# Then, we can import the UEDGE case setup
inputspec = importlib.util.spec_from_file_location("input", "input.py")
inputspec.loader.exec_module(importlib.util.module_from_spec(inputspec))
bbb.issfon=0
bbb.issfon=1
bbb.ftol=1e20
# For some reason fnrm still changes after 1 exmain, but not after 2
# Thus, assert a first exmain here
Expand Down
Binary file not shown.
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ def test_reference(self, epsilon=1e-8):
# Then, we can import the UEDGE case setup
inputspec = importlib.util.spec_from_file_location("input", "input.py")
inputspec.loader.exec_module(importlib.util.module_from_spec(inputspec))
bbb.issfon=0
bbb.issfon=1
bbb.ftol=1e20
# For some reason fnrm still changes after 1 exmain, but not after 2
# Thus, assert a first exmain here
Expand Down
Binary file modified pytests/pytests/unittests/D_only/ortho/default/solution.h5
Binary file not shown.
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ def test_reference(self, epsilon=1e-8):
# Then, we can import the UEDGE case setup
inputspec = importlib.util.spec_from_file_location("input", "input.py")
inputspec.loader.exec_module(importlib.util.module_from_spec(inputspec))
bbb.issfon=0
bbb.issfon=1
bbb.ftol=1e20
# For some reason fnrm still changes after 1 exmain, but not after 2
# Thus, assert a first exmain here
Expand Down
Binary file modified pytests/pytests/unittests/D_only/ortho/fixedngcore/solution.h5
Binary file not shown.
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ def test_reference(self, epsilon=1e-8):
# Then, we can import the UEDGE case setup
inputspec = importlib.util.spec_from_file_location("input", "input.py")
inputspec.loader.exec_module(importlib.util.module_from_spec(inputspec))
bbb.issfon=0
bbb.issfon=1
bbb.ftol=1e20
# For some reason fnrm still changes after 1 exmain, but not after 2
# Thus, assert a first exmain here
Expand Down
Binary file modified pytests/pytests/unittests/D_only/ortho/fmiy0/solution.h5
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Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ def test_reference(self, epsilon=1e-8):
# Then, we can import the UEDGE case setup
inputspec = importlib.util.spec_from_file_location("input", "input.py")
inputspec.loader.exec_module(importlib.util.module_from_spec(inputspec))
bbb.issfon=0
bbb.issfon=1
bbb.ftol=1e20
# For some reason fnrm still changes after 1 exmain, but not after 2
# Thus, assert a first exmain here
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Binary file modified pytests/pytests/unittests/D_only/ortho/lzflux1e2/solution.h5
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Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ def test_reference(self, epsilon=1e-8):
# Then, we can import the UEDGE case setup
inputspec = importlib.util.spec_from_file_location("input", "input.py")
inputspec.loader.exec_module(importlib.util.module_from_spec(inputspec))
bbb.issfon=0
bbb.issfon=1
bbb.ftol=1e20
# For some reason fnrm still changes after 1 exmain, but not after 2
# Thus, assert a first exmain here
Expand Down
Binary file modified pytests/pytests/unittests/D_only/ortho/newbcl/solution.h5
Binary file not shown.
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ def test_reference(self, epsilon=1e-8):
# Then, we can import the UEDGE case setup
inputspec = importlib.util.spec_from_file_location("input", "input.py")
inputspec.loader.exec_module(importlib.util.module_from_spec(inputspec))
bbb.issfon=0
bbb.issfon=1
bbb.ftol=1e20
# For some reason fnrm still changes after 1 exmain, but not after 2
# Thus, assert a first exmain here
Expand Down
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