Add_cnt.v.bak

module Add_cnt(clk, enbl, C_add);

input clk, enbl;
output reg[2:0] C_add;

always @ (posedge clk) begin
		if(!enbl) begin
			C_add=3'b111;
			end
		else begin
			C_add<=C_add +3'b001;
		end
end

endmodule