GitHub - Kalclavia/Verilog-Projects: Repository for Verilog Projects I have completed in my ECEN-248 and ECEN-350 coursework. Each project is stored in its own subdirectory with all Verilog code, testbench files, and simulation results included.

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Repository for Verilog Projects I have completed in my ECEN-248 and ECEN-350 coursework. Each project is stored in its own subdirectory with all Verilog code, testbench files, and simulation results included.

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Name		Name	Last commit message	Last commit date
Latest commit History 2 Commits
ECEN 350 - Microprocessor Design & Computer Architecture		ECEN 350 - Microprocessor Design & Computer Architecture
Ecen 248 - Introduction to Verilog & Digital Logic		Ecen 248 - Introduction to Verilog & Digital Logic