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ASIC Jitter Measurement Set-up

This is a reference implementation for on-chip ASIC jitter measurement, making use of Delay Chains (DCs).

Archive Structure

This archive contains the following folders:

  • measurements: Contains measurement data for the ASIC implementation.
  • hardware: Contains netlist and layout views of the ASIC implementation.
  • figures: Contains Python scripts to generate the figures in the publication below and visualizes the data in the measurement folder.
  • lib: Contains helper Python scripts and figure generation options.

Publication

The data contained in this archive supports the following publication

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An ASIC jitter measurement set-up.

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