Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Support riscv64 as binary platform #54011

Merged
merged 7 commits into from
Apr 29, 2024
Merged

Support riscv64 as binary platform #54011

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
7 commits
Select commit Hold shift + click to select a range
878e729
Support riscv64 as binary platform
eschnett Apr 9, 2024
2544ce9
Update RISC-V changes according to @alexfanqi's earlier changes
eschnett Apr 14, 2024
14a8554
Correct RISC-V triple
eschnett Apr 15, 2024
cd8a073
Merge branch 'master' into eschnett/riscv64
eschnett Apr 15, 2024
7e9c25a
Merge branch 'master' into eschnett/riscv64
oscardssmith Apr 16, 2024
a257418
Merge branch 'master' into eschnett/riscv64
oscardssmith Apr 22, 2024
2dd869a
Merge branch 'master' into eschnett/riscv64
eschnett Apr 29, 2024
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
8 changes: 6 additions & 2 deletions base/binaryplatforms.jl
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -194,7 +194,7 @@ end
function validate_tags(tags::Dict)
throw_invalid_key(k) = throw(ArgumentError("Key \"$(k)\" cannot have value \"$(tags[k])\""))
# Validate `arch`
if tags["arch"] ∉ ("x86_64", "i686", "armv7l", "armv6l", "aarch64", "powerpc64le")
if tags["arch"] ∉ ("x86_64", "i686", "armv7l", "armv6l", "aarch64", "powerpc64le", "riscv64")
throw_invalid_key("arch")
end
# Validate `os`
Expand Down Expand Up @@ -597,6 +597,7 @@ const arch_mapping = Dict(
"armv7l" => "arm(v7l)?", # if we just see `arm-linux-gnueabihf`, we assume it's `armv7l`
"armv6l" => "armv6l",
"powerpc64le" => "p(ower)?pc64le",
"riscv64" => "riscv64",
eschnett marked this conversation as resolved.
Show resolved Hide resolved
)
# Keep this in sync with `CPUID.ISAs_by_family`
# These are the CPUID side of the microarchitectures targeted by GCC flags in BinaryBuilder.jl
Expand Down Expand Up @@ -632,7 +633,10 @@ const arch_march_isa_mapping = let
],
"powerpc64le" => [
"power8" => get_set("powerpc64le", "power8"),
]
],
"riscv64" => [
"riscv64" => get_set("riscv64", "riscv64"),
],
)
end
const os_mapping = Dict(
Expand Down
6 changes: 5 additions & 1 deletion base/cpuid.jl
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -64,7 +64,11 @@ const ISAs_by_family = Dict(
"powerpc64le" => [
# We have no way to test powerpc64le features yet, so we're only going to declare the lowest ISA:
"power8" => ISA(Set{UInt32}()),
]
],
"riscv64" => [
# We have no way to test riscv64 features yet, so we're only going to declare the lowest ISA:
"riscv64" => ISA(Set{UInt32}()),
eschnett marked this conversation as resolved.
Show resolved Hide resolved
],
)

# Test a CPU feature exists on the currently-running host
Expand Down