This is a simple Xilinx XDMA example that targets the Xilinx XCAU15P and uses PCIe4.0 x4 XDMA connected to DDR4. There is also an example where the PCIe bus is connected to BRAM form maximum throughput (50Gbps / 6.3GB/s). The board I used (Alinx AXAU15) only had x16 DDR4 and so does not reach the maximum throughput the PCIe4x4 bus is able to reach when connected to DDR.
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This is a simple Xilinx XDMA example that targets the Xilinx XCAU15P and uses PCIe4.0 x4 to DDR. There is also a BRAM example.
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Johnsel/xilinx-xcau15p-pcie-gen4
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This is a simple Xilinx XDMA example that targets the Xilinx XCAU15P and uses PCIe4.0 x4 to DDR. There is also a BRAM example.
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