Merge stm32-rs#163

163: Add Basic Complementary Channel Support to PWM r=therealprof a=AdinAck

## Motivation
Issue stm32-rs#162 created by *myself*.
TL;DR: PWM module did not support complementary channels, it should.

## Change(s) Description
- Add CHxN pins, (traits?), and structs and whatnot
- Set `OSSR` and `CCxNE` registers accordingly

## Testing
I have only confirmed it works on CH1/CH1N, but I don't see why it wouldn't work on the others.

## Warning
This is my first time using Rust.

Co-authored-by: Adin Ackerman <[email protected]>

Author: bors[bot]

CHANGELOG.md

@@ -7,6 +7,10 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ## [Unreleased]
 
+### Added
+
+- PWM complementary output capability for TIM1 with new example to demonstrate
+
 ### Changed
 
 - Updated the `cast` dependency from 0.2 to 0.3

examples/pwm_complementary.rs

@@ -0,0 +1,60 @@
+#![deny(unsafe_code)]
+#![no_main]
+#![no_std]
+
+// Halt on panic
+use panic_halt as _;
+
+use cortex_m;
+use cortex_m_rt::entry;
+
+use stm32f0xx_hal as hal;
+
+use hal::{delay::Delay, pac, prelude::*, pwm};
+
+#[entry]
+fn main() -> ! {
+    if let Some(mut dp) = pac::Peripherals::take() {
+        // Set up the system clock.
+        let mut rcc = dp.RCC.configure().sysclk(8.mhz()).freeze(&mut dp.FLASH);
+
+        let gpioa = dp.GPIOA.split(&mut rcc);
+        let channels = cortex_m::interrupt::free(move |cs| {
+            (
+                gpioa.pa8.into_alternate_af2(cs), // on TIM1_CH1
+                gpioa.pa7.into_alternate_af2(cs), // on TIM1_CH1N
+            )
+        });
+
+        let pwm = pwm::tim1(dp.TIM1, channels, &mut rcc, 20u32.khz());
+        let (mut ch1, mut ch1n) = pwm;
+        let max_duty = ch1.get_max_duty();
+        ch1.set_duty(max_duty / 2);
+        ch1.enable();
+        ch1n.enable();
+
+        // simple duty sweep
+        if let Some(cp) = cortex_m::Peripherals::take() {
+            let mut delay = Delay::new(cp.SYST, &rcc);
+
+            let steps = 100;
+
+            loop {
+                for i in 0..steps {
+                    ch1.set_duty(max_duty / steps * i);
+                    delay.delay_ms(30u16);
+                }
+
+                for i in (1..steps).rev() {
+                    ch1.set_duty(max_duty / steps * i);
+                    delay.delay_ms(30u16);
+                }
+            }
+        }
+    }
+
+    // something went wrong when acquiring peripheral access
+    loop {
+        cortex_m::asm::nop();
+    }
+}