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TCP/IP controlled VPI JTAG Interface.

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jtag_vpi

TCP/IP controlled VPI JTAG Interface.

+------------------+     +-----------------+     +------------------+      +----------+
+                  +     +                 +     +                  +      +          +
+ Testbench client + <=> + JTAG VPI server + <-> + JTAG VPI verilog + <--> + JTAG TAP +
+                  +     +                 +     +                  +      +          +
+------------------+     +-----------------+     +------------------+      +----------+
    test_client.c             jtag_vpi.c               jtag_vpi.v             any tap...
-------------------- TCP  ------------------  VPI ---------------------   --------------
--------------------      ---------------------------------------------   --------------

A testbench is provided and can be run with:

cd sim/run
make sim

This simulation requires icarus verilog. Result output is a waveform in VCD format.

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TCP/IP controlled VPI JTAG Interface.

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  • Verilog 81.3%
  • C 8.6%
  • Coq 6.4%
  • C++ 3.3%
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