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# !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! # THIS IS A FORK OF https://github.com/NetFPGA/NetFPGA-PLUS # Do not use this fork unless you are aware of the differences # between this and the base repo. # !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! # # Copyright (c) 2021 Yuta Tokusashi # All rights reserved. # # This software was developed by the University of Cambridge Computer # Laboratory under EPSRC EARL Project EP/P025374/1 alongside support # from Xilinx Inc. # # @NETFPGA_LICENSE_HEADER_START@ # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. # You may obtain a copy of the License at # # http://www.apache.org/licenses/LICENSE-2.0 # # Unless required by applicable law or agreed to in writing, software # distributed under the License is distributed on an "AS IS" BASIS, # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. # See the License for the specific language governing permissions and # limitations under the License. # # @NETFPGA_LICENSE_HEADER_END@ # Welcome to the NetFPGA-PLUS base package. For documentation on its content and use, as well as general information on the NetFPGA-SUME platform, please visit the documentation wiki: /wiki The wiki additionally contains a useful "Getting Started Guide" for new users, which can be found here: https://github.com/NetFPGA/NetFPGA-PLUS/wiki/Getting-Started-Guide Have fun!
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Greg's fork of NetFPGA-PLUS to work on getting NF+ running under Xilinx 2023.1 tools and explore DMA performance
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