InstCountCI: Update

Signed-off-by: Alyssa Rosenzweig <[email protected]>
FEX-Emu · Jan 23, 2024 · 18a7dbd · 18a7dbd
1 parent 3cf78ef
commit 18a7dbd
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Showing 2 changed files with 12 additions and 16 deletions.
diff --git a/unittests/InstructionCountCI/FlagM/VEX_map_group.json b/unittests/InstructionCountCI/FlagM/VEX_map_group.json
@@ -66,30 +66,28 @@
       ]
     },
     "blsi eax, ebx": {
-      "ExpectedInstructionCount": 6,
+      "ExpectedInstructionCount": 5,
       "Comment": [
         "Map group 17 0b011 32-bit"
       ],
       "ExpectedArm64ASM": [
         "neg w20, w7",
         "and w4, w7, w20",
-        "cmp x4, #0x0 (0)",
-        "cset x20, ne",
         "tst w4, w4",
+        "cset w20, ne",
         "rmif x20, #63, #nzCv"
       ]
     },
     "blsi rax, rbx": {
-      "ExpectedInstructionCount": 6,
+      "ExpectedInstructionCount": 5,
       "Comment": [
         "Map group 17 0b011 64-bit"
       ],
       "ExpectedArm64ASM": [
         "neg x20, x7",
         "and x4, x7, x20",
-        "cmp x4, #0x0 (0)",
-        "cset x20, ne",
         "tst x4, x4",
+        "cset w20, ne",
         "rmif x20, #63, #nzCv"
       ]
     }

diff --git a/unittests/InstructionCountCI/VEX_map_group.json b/unittests/InstructionCountCI/VEX_map_group.json
@@ -673,34 +673,32 @@
       ]
     },
     "blsi eax, ebx": {
-      "ExpectedInstructionCount": 8,
+      "ExpectedInstructionCount": 7,
       "Comment": [
         "Map group 17 0b011 32-bit"
       ],
       "ExpectedArm64ASM": [
         "neg w20, w7",
         "and w4, w7, w20",
-        "cmp x4, #0x0 (0)",
-        "cset x20, ne",
         "tst w4, w4",
-        "mrs x21, nzcv",
-        "orr w20, w21, w20, lsl #29",
+        "mrs x20, nzcv",
+        "cset w21, ne",
+        "orr w20, w20, w21, lsl #29",
         "msr nzcv, x20"
       ]
     },
     "blsi rax, rbx": {
-      "ExpectedInstructionCount": 8,
+      "ExpectedInstructionCount": 7,
       "Comment": [
         "Map group 17 0b011 64-bit"
       ],
       "ExpectedArm64ASM": [
         "neg x20, x7",
         "and x4, x7, x20",
-        "cmp x4, #0x0 (0)",
-        "cset x20, ne",
         "tst x4, x4",
-        "mrs x21, nzcv",
-        "orr w20, w21, w20, lsl #29",
+        "mrs x20, nzcv",
+        "cset w21, ne",
+        "orr w20, w20, w21, lsl #29",
         "msr nzcv, x20"
       ]
     }