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Revert "[SelectionDAG] Add preliminary plumbing for samesign flag" (l…
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…lvm#114647)

Crashes on ARM builds
https://lab.llvm.org/buildbot/#/builders/85/builds/2548
```
DAGCombiner.cpp:16157: SDValue (anonymous
namespace)::DAGCombiner::visitFREEZE(SDNode *):
Assertion `DAG.isGuaranteedNotToBeUndefOrPoison(R,
false) && "Can't create node that may be
undef/poison!"' failed.
```

Issue llvm#114648

This reverts commit 19c8475.
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vitalybuka authored Nov 2, 2024
1 parent 92daad2 commit c5eb591
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Showing 5 changed files with 3 additions and 17 deletions.
2 changes: 1 addition & 1 deletion llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
Original file line number Diff line number Diff line change
Expand Up @@ -1267,7 +1267,7 @@ class MachineIRBuilder {
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildICmp(CmpInst::Predicate Pred, const DstOp &Res,
const SrcOp &Op0, const SrcOp &Op1,
std::optional<unsigned> Flags = std::nullopt);
std::optional<unsigned> Flgs = std::nullopt);

/// Build and insert a \p Res = G_FCMP \p Pred\p Op0, \p Op1
///
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8 changes: 2 additions & 6 deletions llvm/include/llvm/CodeGen/SelectionDAGNodes.h
Original file line number Diff line number Diff line change
Expand Up @@ -411,14 +411,12 @@ struct SDNodeFlags {
NoFPExcept = 1 << 12,
// Instructions with attached 'unpredictable' metadata on IR level.
Unpredictable = 1 << 13,
// Compare instructions which may carry the samesign flag.
SameSign = 1 << 14,

// NOTE: Please update LargestValue in LLVM_DECLARE_ENUM_AS_BITMASK below
// the class definition when adding new flags.

PoisonGeneratingFlags = NoUnsignedWrap | NoSignedWrap | Exact | Disjoint |
NonNeg | NoNaNs | NoInfs | SameSign,
NonNeg | NoNaNs | NoInfs,
};

/// Default constructor turns off all optimization flags.
Expand All @@ -440,7 +438,6 @@ struct SDNodeFlags {
void setNoSignedWrap(bool b) { setFlag<NoSignedWrap>(b); }
void setExact(bool b) { setFlag<Exact>(b); }
void setDisjoint(bool b) { setFlag<Disjoint>(b); }
void setSameSign(bool b) { setFlag<SameSign>(b); }
void setNonNeg(bool b) { setFlag<NonNeg>(b); }
void setNoNaNs(bool b) { setFlag<NoNaNs>(b); }
void setNoInfs(bool b) { setFlag<NoInfs>(b); }
Expand All @@ -457,7 +454,6 @@ struct SDNodeFlags {
bool hasNoSignedWrap() const { return Flags & NoSignedWrap; }
bool hasExact() const { return Flags & Exact; }
bool hasDisjoint() const { return Flags & Disjoint; }
bool hasSameSign() const { return Flags & SameSign; }
bool hasNonNeg() const { return Flags & NonNeg; }
bool hasNoNaNs() const { return Flags & NoNaNs; }
bool hasNoInfs() const { return Flags & NoInfs; }
Expand All @@ -477,7 +473,7 @@ struct SDNodeFlags {
};

LLVM_DECLARE_ENUM_AS_BITMASK(decltype(SDNodeFlags::None),
SDNodeFlags::SameSign);
SDNodeFlags::Unpredictable);

inline SDNodeFlags operator|(SDNodeFlags LHS, SDNodeFlags RHS) {
LHS |= RHS;
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3 changes: 0 additions & 3 deletions llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1105,9 +1105,6 @@ EmitMachineNode(SDNode *Node, bool IsClone, bool IsCloned,

if (Flags.hasDisjoint())
MI->setFlag(MachineInstr::MIFlag::Disjoint);

if (Flags.hasSameSign())
MI->setFlag(MachineInstr::MIFlag::SameSign);
}

// Emit all of the actual operands of this instruction, adding them to the
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4 changes: 0 additions & 4 deletions llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -3652,10 +3652,6 @@ void SelectionDAGBuilder::visitICmp(const ICmpInst &I) {
Op2 = DAG.getPtrExtOrTrunc(Op2, getCurSDLoc(), MemVT);
}

SDNodeFlags Flags;
Flags.setSameSign(I.hasSameSign());
SelectionDAG::FlagInserter FlagsInserter(DAG, Flags);

EVT DestVT = DAG.getTargetLoweringInfo().getValueType(DAG.getDataLayout(),
I.getType());
setValue(&I, DAG.getSetCC(getCurSDLoc(), DestVT, Op1, Op2, Opcode));
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3 changes: 0 additions & 3 deletions llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -653,9 +653,6 @@ void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
if (getFlags().hasDisjoint())
OS << " disjoint";

if (getFlags().hasSameSign())
OS << " samesign";

if (getFlags().hasNonNeg())
OS << " nneg";

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