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release/v1.0.0 #12

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@cchaine cchaine commented May 15, 2024

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cchaine added 4 commits May 4, 2024 11:03
* Starts adding the user requirements for the peripheral

* Starts adding configuration registers to the specification

* Adds register definitions

* Add an architecture diagram
* Starts implementing the uart receive logic

* Starts adding unit tests for the rx_frontend

* Implements a ring counter for the packet size

* Adds unit tests for all configurations

* Adds tests to the github workflow

* Adds explicit barrel shifter for the receiver data output

* Fixes wrong timing in baudrate testcase

* Finishes unit tests for the rx frontend

* Starts implementing unit tests for the tx frontend

* Finishes unit tests for the tx frontend

* Starts improving the code of the tx frontend

* Improves code quality for the tx frontend

* Updates the architecture diagram to display the rx/tx frontends

* Starts implementing the wishbone slave

* Starts adding unit tests for the wishbone interface

* Finishes the unit tests of the wb interface

* Starts integrating the modules

* Adds unit test for the cr write

* Finishes the read rxdr test

* Reduces FF usage

* Adds RXOE error detection

* Adds logic for clearing the rxoe field

* Implement parity error detection

* Adds unit test for the parity check

* Adds framing error detection

* Adds full duplex test

* Remove the localparam type linting error
@cchaine cchaine marked this pull request as draft May 15, 2024 21:52
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