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recipes-bsp/coreboot-utils: Use 4.21 as base version for coreboot-uti…
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Signed-off-by: Pawel Langowski <[email protected]>
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PLangowski committed Oct 16, 2024
1 parent b8b1d0a commit 3005526
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Showing 11 changed files with 2 additions and 19 deletions.
2 changes: 0 additions & 2 deletions meta-dts-distro/recipes-bsp/coreboot-utils/cbfstool_git.bb
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Expand Up @@ -2,8 +2,6 @@ require coreboot-utils.inc

SUMMARY = "Tool for manipulating CBFS file"

PV = "1.0+git${SRCPV}"

TARGET_CC_ARCH += "${LDFLAGS}"

EXTRA_OEMAKE = " \
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2 changes: 0 additions & 2 deletions meta-dts-distro/recipes-bsp/coreboot-utils/cbmem_git.bb
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Expand Up @@ -4,8 +4,6 @@ SUMMARY = "CBMEM parser to read e.g. timestamps and console log"

DEPENDS += "pciutils zlib"

PV = "1.0+git${SRCPV}"

EXTRA_OEMAKE = ' \
DESTDIR="${D}" \
PREFIX="${prefix}" \
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2 changes: 2 additions & 0 deletions meta-dts-distro/recipes-bsp/coreboot-utils/coreboot-utils.inc
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Expand Up @@ -5,6 +5,8 @@ SECTION = "coreboot"
LICENSE = "LGPL-2.1-only"
LIC_FILES_CHKSUM = "file://COPYING;md5=751419260aa954499f7abaabaa882bbe"

PV = "4.21+git${SRCPV}"

SRC_URI = " \
git://github.com/Dasharo/coreboot.git;protocol=https;branch=dasharo-4.21\
"
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2 changes: 0 additions & 2 deletions meta-dts-distro/recipes-bsp/coreboot-utils/ectool_git.bb
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Expand Up @@ -2,8 +2,6 @@ require coreboot-utils.inc

SUMMARY = "Dumps the RAM of a laptop's Embedded/Environmental Controller (EC)."

PV = "1.0+git${SRCPV}"

EXTRA_OEMAKE = ' \
DESTDIR="${D}" \
PREFIX="${prefix}" \
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2 changes: 0 additions & 2 deletions meta-dts-distro/recipes-bsp/coreboot-utils/ifdtool_git.bb
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Expand Up @@ -2,8 +2,6 @@ require coreboot-utils.inc

SUMMARY = "Extract and dump Intel Firmware Descriptor information"

PV = "1.0+git${SRCPV}"

TARGET_CC_ARCH += "${LDFLAGS}"

EXTRA_OEMAKE = ' \
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2 changes: 0 additions & 2 deletions meta-dts-distro/recipes-bsp/coreboot-utils/intelmetool_git.bb
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Expand Up @@ -4,8 +4,6 @@ SUMMARY = "Dump interesting things about Management Engine even if hidden"

DEPENDS += "pciutils zlib"

PV = "1.0+git${SRCPV}"

EXTRA_OEMAKE = ' \
DESTDIR="${D}" \
PREFIX="${prefix}" \
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2 changes: 0 additions & 2 deletions meta-dts-distro/recipes-bsp/coreboot-utils/intelp2m_git.bb
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Expand Up @@ -7,8 +7,6 @@ SUMMARY = "\

LIC_FILES_CHKSUM = "file://../../COPYING;md5=751419260aa954499f7abaabaa882bbe"

PV = "1.0+git${SRCPV}"

GO_IMPORT = "github.com/dasharo/coreboot/"

# we need to override SRC_URI from coreboot-utils.inc so it's unpacked in the
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2 changes: 0 additions & 2 deletions meta-dts-distro/recipes-bsp/coreboot-utils/inteltool_git.bb
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Expand Up @@ -7,8 +7,6 @@ SUMMARY = "\

DEPENDS += "pciutils zlib"

PV = "1.0+git${SRCPV}"

EXTRA_OEMAKE = ' \
DESTDIR="${D}" \
PREFIX="${prefix}" \
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1 change: 0 additions & 1 deletion meta-dts-distro/recipes-bsp/coreboot-utils/msrtool_git.bb
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Expand Up @@ -2,7 +2,6 @@ require coreboot-utils.inc

SUMMARY = "Dumps chipset-specific MSR registers."
DEPENDS += "pciutils"
PV = "1.0+git${SRCPV}"
S = "${WORKDIR}/git/util/msrtool"
export PREFIX = "${prefix}"
inherit autotools-brokensep
2 changes: 0 additions & 2 deletions meta-dts-distro/recipes-bsp/coreboot-utils/nvramtool_git.bb
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Expand Up @@ -2,8 +2,6 @@ require coreboot-utils.inc

SUMMARY = "Reads and writes coreboot parameters and displaying information from the coreboot table in CMOS/NVRAM. "

PV = "1.0+git${SRCPV}"

EXTRA_OEMAKE = ' \
DESTDIR="${D}" \
PREFIX="${prefix}" \
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2 changes: 0 additions & 2 deletions meta-dts-distro/recipes-bsp/coreboot-utils/superiotool_git.bb
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Expand Up @@ -4,8 +4,6 @@ SUMMARY = "A user-space utility to detect Super I/O of a mainboard and provide d

DEPENDS += "pciutils zlib"

PV = "1.0+git${SRCPV}"

EXTRA_OEMAKE = ' \
DESTDIR="${D}" \
PREFIX="${prefix}" \
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