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[NOT FOR MERGE] Raptor cs talos 2/patches #331
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[NOT FOR MERGE] Raptor cs talos 2/patches #331
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Until now tcg-2.0/tss.c was just assuming certain buffer size and hash algorithm. Change it to accept digest type, which the call sites know. Also drop `uint8_t *out_digest` parameter which was always `NULL` and was handled only by tcg-1.2 code. Change-Id: I944302b502e3424c5041b17c713a867b0fc535c4 Signed-off-by: Sergii Dmytruk <[email protected]> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68745 Reviewed-by: Julius Werner <[email protected]> Tested-by: build bot (Jenkins) <[email protected]> Reviewed-by: Frans Hendriks <[email protected]>
This commit doesn't add any new format options, just makes selecting existing format explicit. Ticket: https://ticket.coreboot.org/issues/422 Change-Id: I3903aff54e01093bc9ea75862bbf5989cc6e6c55 Signed-off-by: Sergii Dmytruk <[email protected]> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68746 Tested-by: build bot (Jenkins) <[email protected]> Reviewed-by: Michał Żygowski <[email protected]>
TCPA usually refers to log described by TPM 1.2 specification. Change-Id: I896bd94f18b34d6c4b280f58b011d704df3d4022 Ticket: https://ticket.coreboot.org/issues/423 Signed-off-by: Sergii Dmytruk <[email protected]> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69444 Tested-by: build bot (Jenkins) <[email protected]> Reviewed-by: Julius Werner <[email protected]>
Change-Id: I3013bd5f29f1412fbe646dc74d8946704b750a66 Ticket: https://ticket.coreboot.org/issues/423 Signed-off-by: Sergii Dmytruk <[email protected]> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69445 Tested-by: build bot (Jenkins) <[email protected]> Reviewed-by: Julius Werner <[email protected]>
Used by default for all boards with TPM1 which don't specify log format explicitly. Ticket: https://ticket.coreboot.org/issues/423 Change-Id: I89720615a75573d44dd0a39ad3d7faa78f125843 Signed-off-by: Michał Żygowski <[email protected]> Signed-off-by: Sergii Dmytruk <[email protected]> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68747 Tested-by: build bot (Jenkins) <[email protected]> Reviewed-by: Julius Werner <[email protected]>
Used by default for all boards with TPM2 which don't specify log format explicitly. Change-Id: I0fac386bebab1b7104378ae3424957c6497e84e1 Ticket: https://ticket.coreboot.org/issues/422 Ticket: https://ticket.coreboot.org/issues/423 Signed-off-by: Michał Żygowski <[email protected]> Signed-off-by: Sergii Dmytruk <[email protected]> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68748 Tested-by: build bot (Jenkins) <[email protected]> Reviewed-by: Julius Werner <[email protected]>
De-duplicate common initialization code (self-test and device identification) and put it in a new ipmi_if.c unit, which is supposed to work with any underlying IPMI interface. Change-Id: Ia99da6fb63adb7bf556d3d6f7964b34831be8a2f Signed-off-by: Sergii Dmytruk <[email protected]>
Unlike already implemented Keyboard Controller Style (KCS) interface Block Transfer interface is not byte-oriented and implies that device is capable of buffering command before processing it. Another difference is that polling can be replaced with interrupts, though not used by this implementation. Change-Id: Idb67972d1c38bbae04c7b4de3405350c229a05b9 Signed-off-by: Sergii Dmytruk <[email protected]>
skiboot's Makefile always executes $(CC) to determine whether its clang or GCC and not setting CROSS for clean target results in this annoying output (assuming `powerpc64-linux-gcc` isn't available): make[2]: powerpc64-linux-gcc: No such file or directory Change-Id: I242b2d7c1bdf1bbd70fd4e4e0605341fe8301ca5 Signed-off-by: Sergii Dmytruk <[email protected]>
Reset function, constants and include are not used outside of scom.c and not going to be. Change-Id: Iff4e98ae52c7099954f0c20fcb639eb87af15534 Signed-off-by: Sergii Dmytruk <[email protected]>
Change-Id: I80fccfa6d108b68d6f33a3d47766205b423a41ff Signed-off-by: Krystian Hebel <[email protected]>
Change-Id: I9d4f048c859bc89897d50a5a07468c3375aa1dcf Signed-off-by: Krystian Hebel <[email protected]>
Change-Id: Ie4e6cfaeae16aba1853b33d527eddebadfbd3887 Signed-off-by: Krystian Hebel <[email protected]>
CBFS location in memory is different than on the real hardware. Change-Id: Icd806a57f449042c883b624056c05c1ff7e4c17e Signed-off-by: Krystian Hebel <[email protected]>
Change-Id: Ie74b1e34f9aebe151d0fdb0e95c003510fd864c3 Signed-off-by: Krystian Hebel <[email protected]>
Change-Id: I0c4f74c7b27c8bb5599d68305adf369ddc6fcc70 Signed-off-by: Michał Żygowski <[email protected]> Signed-off-by: Krystian Hebel <[email protected]>
Change-Id: I8541aa6f1429ed6143830ed11c47c150183ddf0d Signed-off-by: Michał Żygowski <[email protected]>
Change-Id: Id88baef5ecb1f8ffd74a7f464bbbaaaea0ca643d Signed-off-by: Michał Żygowski <[email protected]>
Change-Id: I1504b6e87e6a35d2339abd8d33a84d78e250e0f4 Signed-off-by: Michał Żygowski <[email protected]> Signed-off-by: Krystian Hebel <[email protected]> Signed-off-by: Sergii Dmytruk <[email protected]>
On PPC64 each address is logically OR'ed with HRMOR (Hypervisor Real Mode Offset Register) before it is dispatched to the underlying memory, meaning that memory space overlaps at the least significant bit set in HRMOR. coreboot is entered with HRMOR = 4GB-128MB both on hardware (when started by hostboot bootloader) and in Qemu in hb-mode. This means that memory overlaps every 128MB in this particular case. HRMOR can be explicitly ignored when MSB of an address is set, but this would require using different memory model for linking. If we zero HRMOR in bootblock, linking can be done against real address. This greatly simplifies memory layout and allows to forget about HRMOR from that point on. Signed-off-by: Krystian Hebel <[email protected]> Signed-off-by: Maciej Pijanowski <[email protected]> Change-Id: I0170463968c91b943c4b0dc15fe73fa616a164da
Tested on QEMU with ECC. Use mmap_helper to handle loading of compressed ramstage. Bootblock fits in SEEPROM with both console and LZ4 romstage compression, but not with verbose CBFS debug messages. Signed-off-by: Krystian Hebel <[email protected]> Change-Id: I91c72c52849eb1e3fafe43390351537d04382e46
Signed-off-by: Igor Bagnucki <[email protected]> Change-Id: I49ad6094acaccf731ab6d6b45ac103d485a3179c
Signed-off-by: Sergii Dmytruk <[email protected]> Change-Id: I2c7f43adc04937cb1d041c24073ecb70298cae82
romstage needs to know values of attributes that are required for configuring RAM. These values are stored inside MEMD partition of PNOR in binary form that's not readily usable (need to do multiple look ups followed by data extraction). Signed-off-by: Sergii Dmytruk <[email protected]> Change-Id: I6b744cd66384074a12ff764e9e3a990c3c2e8426
Signed-off-by: Krystian Hebel <[email protected]> Signed-off-by: Sergii Dmytruk <[email protected]> Change-Id: I415d9e785d5bf395c2872990a80f7dec73664f58
Signed-off-by: Krystian Hebel <[email protected]> Change-Id: Ifd0c1e4ace3ea916f575f10857e14e56233004ec
This fill mem_data global variable with information about memory hardware. Signed-off-by: Krystian Hebel <[email protected]> Change-Id: I6f537ff225387a29d5d609c05729e1ab993fbd37
…ccessors Signed-off-by: Krystian Hebel <[email protected]> Change-Id: I5e1d9ea393800cdcbf435262ae14e11cc7fea496
List of renamed functions: * write_rscom() * read_rscom() * rscom_and_or() * rscom_and() * rscom_or() * write_rscom_for_chiplet() * read_rscom_for_chiplet() * rscom_and_or_for_chiplet() * rscom_and_for_chiplet() * rscom_or_for_chiplet() Change-Id: I28cec407798433c4d1a5d82ab10edbd4565c42f4 Signed-off-by: Sergii Dmytruk <[email protected]>
Only provide address modification function and use it with generic SCOM accessors. Change-Id: Ib4df9dfd59685e3ad313d45a77267aff9e36d644 Signed-off-by: Sergii Dmytruk <[email protected]>
I've moved all start istep messages to report_istep() and removed end istep messages, also changed lof level to INFO. Change-Id: Ifb3180afe2942ccd23429dbd1fa141b74e3b2129 Signed-off-by: Kacper Stojek <[email protected]>
Change-Id: I4f12d13ac560b2f7cb42b057922343d25af6bfb2 Signed-off-by: Kacper Stojek <[email protected]>
Change-Id: Ibe35da73ebf116f6a1821df758c13b054d57a96a Signed-off-by: Kacper Stojek <[email protected]> Signed-off-by: Sergii Dmytruk <[email protected]>
Change-Id: Idea5bd1ff8785da99f808e18b4dfa2765fe88788 Signed-off-by: Kacper Stojek <[email protected]> Signed-off-by: Sergii Dmytruk <[email protected]>
Fields for coreboot table checksums in commonlib/coreboot_tables.h were split from uint32_t to two uint16_t (checksum and padding) each. This doesn't change anything for LE targets, but allows for accessing correct bytes on BE platforms without shifting or pointer juggling. Signed-off-by: Krystian Hebel <[email protected]> Change-Id: I52f6b8bf1110fd3cb0d499be15de0ad147605c4b
Signed-off-by: Krystian Hebel <[email protected]> Change-Id: Ie501915df4a51e7ca394b3c4a542c3faa0e2bf9a
It's not clear why bytes were swapped only in check for 9535, but updating both constants seems to make sense. Signed-off-by: Sergii Dmytruk <[email protected]>
Change-Id: I469d0c12a40b9bbb3bec53d486511c4bfc326499 Signed-off-by: Sergii Dmytruk <[email protected]>
Change-Id: I9a8bc4386c637ebf8398af0d1c4d61bc051cc001 Signed-off-by: Sergii Dmytruk <[email protected]>
Change-Id: Ibe35da73ebf116f6a1821df758c13b054d57a96a Signed-off-by: Kacper Stojek <[email protected]> Signed-off-by: Sergii Dmytruk <[email protected]>
This protects against some of unintentional integer promotions, e.g.: uint16_t freq_mhz = 2148; // or bigger uint64_t freq = freq_mhz * MHz; In this example, MHz used to be treated as int32_t, and because int32_t can represent every value that uin16_t can, multiplication was being performed with both arguments treated as int32_t. During assignment, result of multiplication is promoted to int64_t (because it can represent each value that int32_t can), and finally implicitly converted to uint64_t. Promotions preserve the value, including the sign, so if result of multiplication is negative, the same negative number (but extended to 64 bits) is converted to unsigned number. Signed-off-by: Krystian Hebel <[email protected]> Change-Id: Ie60a6ee82db80328e44639175272cc8097f36c3b
Signed-off-by: Krystian Hebel <[email protected]> Change-Id: I2bc14191268e6049cd63832cf0ff27bda0cc032d
This is required for proper power management by OS. Signed-off-by: Krystian Hebel <[email protected]> Change-Id: I6c16db1dc9c7af9cf33bf2ab271af21507a20266
CBMEM contents may be dumped to file and parsed offline, e.g. for QEMU targets. This will also be used to access CBMEM exposed in sysfs after coreboot driver in Linux is updated. Signed-off-by: Krystian Hebel <[email protected]> Change-Id: I273e1eed320b3d99a57ae5b361b79238f40cf825
Kernel driver may expose CBMEM in sysfs. By doing so, it is possible to use cbmem utility even with CONFIG_STRICT_DEVMEM. If there is no file exposed, cbmem falls back to probing memory directly. Signed-off-by: Krystian Hebel <[email protected]>
This way this memory will be available for mapping via /dev/mem even when kernel is configured with CONFIG_[IO_]STRICT_DEVMEM. This makes CBMEM available in host via cbmem tool. Change-Id: I968067ebb8dfcf816fe72ea9c00985d0d10f5fbb Signed-off-by: Sergii Dmytruk <[email protected]>
Signed-off-by: Krystian Hebel <[email protected]> Change-Id: Ia2f5687f8b7901847bc8ff3143609bde434f49cb
coreboot is made to export the range allocated for the log. The range is helpful as there is no easy way to determine the size of the log from its header without parsing vendor info. Change-Id: Ib76dc7dec56dd1789a219539a1ac05a958f47a5c Ticket: https://ticket.coreboot.org/issues/425 Signed-off-by: Krystian Hebel <[email protected]> Signed-off-by: Michał Żygowski <[email protected]> Signed-off-by: Sergii Dmytruk <[email protected]>
Signed-off-by: Krystian Hebel <[email protected]> Change-Id: Ib0fbe66baf4bd6d109a09493935186a847c65b25
IDs of sensors of processor state and sensors of core temperature and frequency are chip-specific. Without this change BMC could fail to control fan of the second CPU. Signed-off-by: Sergii Dmytruk <[email protected]>
Sending those IPMI messages seems to have no effect and Hostboot likely has a bug in doing it, so there is probably no need to add the corresponding code. Signed-off-by: Sergii Dmytruk <[email protected]>
Without this skiboot uses its default of 1ms, which is inappropriate for a TPM device as it performs clock stretching for a second or two. Signed-off-by: Sergii Dmytruk <[email protected]>
To pick up fix in Infineon TPM driver that caused the device to be disabled by skiboot during load even when it functions well (just returns all ones for registers sometimes). Signed-off-by: Sergii Dmytruk <[email protected]>
Not specifying target results in building of unused LID image and also building tools (for GCOV and for building LID) using host GCC whose version isn't known for sure and can cause a build failure. Since we only need skiboot.elf, don't build anything more. Signed-off-by: Sergii Dmytruk <[email protected]>
PPC64 has architectural reliable timer, so there is no reason to have timestamps disabled. Signed-off-by: Krystian Hebel <[email protected]>
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This change allows for proper parsing of timestamp table on platforms that use big endian in coreboot and little endian in target OS. POWER9 is an example of such architecture. util/cbmem assumes that it runs on little endian system in most of its code, not only related to timestamps. This patch doesn't change that. TEST=run cbmem -t on Talos 2, get sane results Signed-off-by: Krystian Hebel <[email protected]>
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