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Merge pull request cnlohr#427 from eeucalyptus/fix_adc_without_debug
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fix the adc code without debug printf
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cnlohr authored Oct 28, 2024
2 parents e6130b3 + 0e6fc51 commit ad9e574
Showing 1 changed file with 39 additions and 40 deletions.
79 changes: 39 additions & 40 deletions ch32v003fun/ch32v003fun.c
Original file line number Diff line number Diff line change
Expand Up @@ -1571,46 +1571,6 @@ WEAK int putchar(int c)
return 1;
}

void funAnalogInit()
{
//RCC->CFGR0 &= ~(0x1F<<11); // Assume ADCPRE = 0
RCC->APB2PCENR |= RCC_APB2Periph_ADC1;

// Reset ADC.
RCC->APB2PRSTR |= RCC_APB2Periph_ADC1;
RCC->APB2PRSTR &= ~RCC_APB2Periph_ADC1;

// set sampling time for all channels to 15 (A good middleground) ADC_SMP0_1.
ADC1->SAMPTR2 = (ADC_SMP0_1<<(3*0)) | (ADC_SMP0_1<<(3*1)) | (ADC_SMP0_1<<(3*2)) | (ADC_SMP0_1<<(3*3)) | (ADC_SMP0_1<<(3*4)) | (ADC_SMP0_1<<(3*5)) | (ADC_SMP0_1<<(3*6)) | (ADC_SMP0_1<<(3*7)) | (ADC_SMP0_1<<(3*8)) | (ADC_SMP0_1<<(3*9));
ADC1->SAMPTR1 = (ADC_SMP0_1<<(3*0)) | (ADC_SMP0_1<<(3*1)) | (ADC_SMP0_1<<(3*2)) | (ADC_SMP0_1<<(3*3)) | (ADC_SMP0_1<<(3*4)) | (ADC_SMP0_1<<(3*5));

ADC1->CTLR2 |= ADC_ADON | ADC_EXTSEL; // turn on ADC and set rule group to sw trig

// Reset calibration
ADC1->CTLR2 |= ADC_RSTCAL;
while(ADC1->CTLR2 & ADC_RSTCAL);

// Calibrate
ADC1->CTLR2 |= ADC_CAL;
while(ADC1->CTLR2 & ADC_CAL);

}


int funAnalogRead( int nAnalogNumber )
{
ADC1->RSQR3 = nAnalogNumber;

// start sw conversion (auto clears)
ADC1->CTLR2 |= ADC_SWSTART;

// wait for conversion complete
while(!(ADC1->STATR & ADC_EOC));

// get result
return ADC1->RDATAR;
}

void SetupDebugPrintf()
{
// Clear out the sending flag.
Expand Down Expand Up @@ -1780,6 +1740,45 @@ void SystemInit()
#endif
}

void funAnalogInit()
{
//RCC->CFGR0 &= ~(0x1F<<11); // Assume ADCPRE = 0
RCC->APB2PCENR |= RCC_APB2Periph_ADC1;

// Reset ADC.
RCC->APB2PRSTR |= RCC_APB2Periph_ADC1;
RCC->APB2PRSTR &= ~RCC_APB2Periph_ADC1;

// set sampling time for all channels to 15 (A good middleground) ADC_SMP0_1.
ADC1->SAMPTR2 = (ADC_SMP0_1<<(3*0)) | (ADC_SMP0_1<<(3*1)) | (ADC_SMP0_1<<(3*2)) | (ADC_SMP0_1<<(3*3)) | (ADC_SMP0_1<<(3*4)) | (ADC_SMP0_1<<(3*5)) | (ADC_SMP0_1<<(3*6)) | (ADC_SMP0_1<<(3*7)) | (ADC_SMP0_1<<(3*8)) | (ADC_SMP0_1<<(3*9));
ADC1->SAMPTR1 = (ADC_SMP0_1<<(3*0)) | (ADC_SMP0_1<<(3*1)) | (ADC_SMP0_1<<(3*2)) | (ADC_SMP0_1<<(3*3)) | (ADC_SMP0_1<<(3*4)) | (ADC_SMP0_1<<(3*5));

ADC1->CTLR2 |= ADC_ADON | ADC_EXTSEL; // turn on ADC and set rule group to sw trig

// Reset calibration
ADC1->CTLR2 |= ADC_RSTCAL;
while(ADC1->CTLR2 & ADC_RSTCAL);

// Calibrate
ADC1->CTLR2 |= ADC_CAL;
while(ADC1->CTLR2 & ADC_CAL);

}

int funAnalogRead( int nAnalogNumber )
{
ADC1->RSQR3 = nAnalogNumber;

// start sw conversion (auto clears)
ADC1->CTLR2 |= ADC_SWSTART;

// wait for conversion complete
while(!(ADC1->STATR & ADC_EOC));

// get result
return ADC1->RDATAR;
}

// C++ Support

#ifdef CPLUSPLUS
Expand Down

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