refactor: all rk3328 overlays are replaced with reference syntax

CodeChenL · Apr 3, 2024 · 6c58f5c · 6c58f5c
1 parent 6583631
commit 6c58f5c
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Showing 4 changed files with 26 additions and 42 deletions.
diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3328-pwm2.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3328-pwm2.dts
@@ -9,14 +9,10 @@
 		exclusive = "GPIO2_A6";
 		description = "Enable PWM2.\nOn Rock Pi E this is pin 33.";
 	};
+};
 
-	fragment@0 {
-		target = <&pwm2>;
-
-		__overlay__ {
-			status = "okay";
-			pinctrl-names = "default";
-			pinctrl-0 = <&pwm2_pin>;
-		};
-	};
+&pwm2 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&pwm2_pin>;
 };
diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3328-spi0-spidev.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3328-spi0-spidev.dts
@@ -9,22 +9,18 @@
 		exclusive = "GPIO3_A0", "GPIO3_A1", "GPIO3_A2", "GPIO3_B0";
 		description = "Enable spidev on SPI0 on pin 19, 21, 23 & 24.";
 	};
+};
 
-	fragment@0 {
-		target = <&spi0>;
-
-		__overlay__ {
-			status = "okay";
-			pinctrl-names = "default";
-			pinctrl-0 = <&spi0m2_clk &spi0m2_tx &spi0m2_rx &spi0m2_cs0>;
-			#address-cells = <1>;
-			#size-cells = <0>;
+&spi0 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&spi0m2_clk &spi0m2_tx &spi0m2_rx &spi0m2_cs0>;
+	#address-cells = <1>;
+	#size-cells = <0>;
 
-			spidev@0 {
-				compatible = "rockchip,spidev", "armbian,spi-dev";
-				reg = <0>;
-				spi-max-frequency = <50000000>;
-			};
-		};
+	spidev@0 {
+		compatible = "rockchip,spidev", "armbian,spi-dev";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
 	};
 };
diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3328-uart1.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3328-uart1.dts
@@ -9,14 +9,10 @@
 		exclusive = "GPIO3_A4", "GPIO3_A5";
 		description = "Enable UART1";
 	};
+};
 
-	fragment@0 {
-		target = <&uart1>;
-
-		__overlay__ {
-			status = "okay";
-			pinctrl-names = "default";
-			pinctrl-0 = <&uart1_xfer &uart1_cts &uart1_rts>;
-		};
-	};
+&uart1 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart1_xfer &uart1_cts &uart1_rts>;
 };
diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3328-uart2-m1.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3328-uart2-m1.dts
@@ -9,14 +9,10 @@
 		exclusive = "GPIO2_A0", "GPIO2_A1";
 		description = "Enable UART2-M1";
 	};
+};
 
-	fragment@0 {
-		target = <&uart2>;
-
-		__overlay__ {
-			status = "okay";
-			pinctrl-names = "default";
-			pinctrl-0 = <&uart2m1_xfer>;
-		};
-	};
+&uart2 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart2m1_xfer>;
 };