fix: all rk3588 overlays are replaced with reference syntax

CodeChenL · Apr 3, 2024 · 56dabd5 · 56dabd5
1 parent 531d034
commit 56dabd5
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Showing 98 changed files with 705 additions and 1,160 deletions.
diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3588-can1-m0.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3588-can1-m0.dts
@@ -11,17 +11,13 @@
 		exclusive = "GPIO3_B5", "GPIO3_B6";
 		description = "Enable CAN1-M0.\nOn Radxa ROCK 5B this is RX pin 12 & TX pin 35.";
 	};
+};
 
-    fragment@0 {
-        target = <&can1>;
-
-        __overlay__ {
-			status = "okay";
-			compatible = "rockchip,can-2.0";
-			assigned-clocks = <&cru CLK_CAN0>;
-			assigned-clock-rates = <200000000>;
-			pinctrl-names = "default";
-			pinctrl-0 = <&can1m0_pins>;
-		};
-    };
+&can1 {
+	status = "okay";
+	compatible = "rockchip,can-2.0";
+	assigned-clocks = <&cru CLK_CAN0>;
+	assigned-clock-rates = <200000000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&can1m0_pins>;
 };
diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3588-can1-m1.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3588-can1-m1.dts
@@ -11,17 +11,13 @@
 		exclusive = "GPIO4_B2", "GPIO4_B3";
 		description = "Enable CAN1-M0.\nOn Radxa ROCK 5A this is RX pin 13 & TX pin 11.\nOn Radxa ROCK 5B this is RX pin 5 & TX pin 3.\n";
 	};
+};
 
-    fragment@0 {
-        target = <&can1>;
-
-        __overlay__ {
-			compatible = "rockchip,can-2.0";
-			status = "okay";
-			assigned-clocks = <&cru CLK_CAN1>;
-			assigned-clock-rates = <200000000>;
-			pinctrl-names = "default";
-			pinctrl-0 = <&can1m1_pins>;
-        };
-    };
+&can1 {
+	compatible = "rockchip,can-2.0";
+	status = "okay";
+	assigned-clocks = <&cru CLK_CAN1>;
+	assigned-clock-rates = <200000000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&can1m1_pins>;
 };
diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3588-can2-m1.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3588-can2-m1.dts
@@ -11,17 +11,13 @@
 		exclusive = "GPIO0_D4", "GPIO0_D5";
 		description = "Enable CAN2-M1.\nOn Radxa NX5 IO this is RX pin 3 & TX pin 5.\n";
 	};
+};
 
-	fragment@0 {
-		target = <&can2>;
-
-		__overlay__ {
-			compatible = "rockchip,can-2.0";
-			status = "okay";
-			assigned-clocks = <&cru CLK_CAN1>;
-			assigned-clock-rates = <200000000>;
-			pinctrl-names = "default";
-			pinctrl-0 = <&can2m1_pins>;
-		};
-	 };
+&can2 {
+	compatible = "rockchip,can-2.0";
+	status = "okay";
+	assigned-clocks = <&cru CLK_CAN1>;
+	assigned-clock-rates = <200000000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&can2m1_pins>;
 };
diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3588-disable-fiq-debugger.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3588-disable-fiq-debugger.dts
@@ -11,31 +11,23 @@
 		exclusive = "GPIO0_B5", "GPIO0_B6", "fiq_debugger";
 		description = "Disable FIQ Debugger.";
 	};
+};
 
-	fragment@0 {
-		target = <&fiq_debugger>;
-
-		__overlay__ {
-			status = "disabled";
-		};
-	};
-
-	fragment@1 {
-		target = <&pinctrl>;
+&fiq_debugger {
+	status = "disabled";
+};
 
-		__overlay__ {
-			pinctrl-0 = <&gpio0_b5_b6>;
-			pinctrl-names = "default";
+&pinctrl {
+	pinctrl-0 = <&gpio0_b5_b6>;
+	pinctrl-names = "default";
 
-			gpio_func {
-				gpio0_b5_b6: gpio0-b5-b6 {
-					rockchip,pins =
-						/* GPIO0_B5 */
-						<0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>,
-						/* GPIO0_B6 */
-						<0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
-				};
-			};
+	gpio_func {
+		gpio0_b5_b6: gpio0-b5-b6 {
+			rockchip,pins =
+				/* GPIO0_B5 */
+				<0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>,
+				/* GPIO0_B6 */
+				<0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
 	};
 };
diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3588-dwc3-host.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3588-dwc3-host.dts
@@ -9,13 +9,9 @@
 		exclusive = "usbdrd_dwc3-dr_mode";
 		description = "Set OTG port 0 to Host mode.\nUse this when you want to connect USB devices.";
 	};
+};
 
-	fragment@0 {
-		target = <&usbdrd_dwc3_0>;
-
-		__overlay__ {
-			status = "okay";
-			dr_mode = "host";
-		};
-	};
+&usbdrd_dwc3_0 {
+	status = "okay";
+	dr_mode = "host";
 };
diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3588-dwc3-otg.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3588-dwc3-otg.dts
@@ -9,14 +9,10 @@
 		exclusive = "usbdrd_dwc3-dr_mode";
 		description = "Set OTG port 0 to OTG mode.\nUse this for automatic USB role switching.";
 	};
+};
 
-	fragment@0 {
-		target = <&usbdrd_dwc3_0>;
-
-		__overlay__ {
-			status = "okay";
-			dr_mode = "otg";
-			usb-role-switch;
-		};
-	};
+&usbdrd_dwc3_0 {
+	status = "okay";
+	dr_mode = "otg";
+	usb-role-switch;
 };
diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3588-dwc3-peripheral.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3588-dwc3-peripheral.dts
@@ -9,13 +9,9 @@
 		exclusive = "usbdrd_dwc3-dr_mode";
 		description = "Set OTG port 0 to Peripheral mode.\nUse this when you want to connect to another computer.";
 	};
+};
 
-	fragment@0 {
-		target = <&usbdrd_dwc3_0>;
-
-		__overlay__ {
-			status = "okay";
-			dr_mode = "peripheral";
-		};
-	};
+&usbdrd_dwc3_0 {
+	status = "okay";
+	dr_mode = "peripheral";
 };
diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3588-dwc3_1-host.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3588-dwc3_1-host.dts
@@ -9,13 +9,9 @@
 		exclusive = "usbdrd_dwc3_1-dr_mode";
 		description = "Set OTG port 1 to Host mode (ROCK 5B V1.46+).\nUse this when you want to connect USB devices.";
 	};
+};
 
-	fragment@0 {
-		target = <&usbdrd_dwc3_1>;
-
-		__overlay__ {
-			status = "okay";
-			dr_mode = "host";
-		};
-	};
+&usbdrd_dwc3_1 {
+	status = "okay";
+	dr_mode = "host";
 };
diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3588-dwc3_1-peripheral.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3588-dwc3_1-peripheral.dts
@@ -9,13 +9,9 @@
 		exclusive = "usbdrd_dwc3_1-dr_mode";
 		description = "Set OTG port 1 to Peripheral mode (ROCK 5B V1.46+).\nUse this when you want to connect to another computer.";
 	};
+};
 
-	fragment@0 {
-		target = <&usbdrd_dwc3_1>;
-
-		__overlay__ {
-			status = "okay";
-			dr_mode = "peripheral";
-		};
-	};
+&usbdrd_dwc3_1 {
+	status = "okay";
+	dr_mode = "peripheral";
 };
diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3588-fiq-debugger-uart2m2.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3588-fiq-debugger-uart2m2.dts
@@ -9,23 +9,15 @@
 		exclusive = "GPIO3_B1", "GPIO3_B2";
 		description = "Enable FIQ Debugger on UART2-M2.\nOn Radxa ROCK 5B this is TX pin 36 & RX pin 38.\nOn Radxa ROCK 5B+ this is TX pin 36 & RX pin 38.";
 	};
+};
 
-	fragment@0 {
-		target = <&fiq_debugger>;
-
-		__overlay__ {
-			status = "okay";
-			rockchip,serial-id = <2>;
-			pinctrl-names = "default";
-			pinctrl-0 = <&uart2m2_xfer>;
-		};
-	};
-
-	fragment@1 {
-		target = <&uart2>;
+&fiq_debugger {
+	status = "okay";
+	rockchip,serial-id = <2>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart2m2_xfer>;
+};
 
-		__overlay__ {
-			status = "disabled";
-		};
-	};
+&uart2 {
+	status = "disabled";
 };
diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3588-fiq-debugger-uart3m1.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3588-fiq-debugger-uart3m1.dts
@@ -9,23 +9,15 @@
 		exclusive = "GPIO3_B5", "GPIO3_B6";
 		description = "Enable FIQ Debugger on UART3-M1.\nOn Radxa ROCK 5B this is TX pin 12 & RX pin 35.\nOn Radxa ROCK 5B+ this is TX pin 12 & RX pin 35.";
 	};
+};
 
-	fragment@0 {
-		target = <&fiq_debugger>;
-
-		__overlay__ {
-			status = "okay";
-			rockchip,serial-id = <3>;
-			pinctrl-names = "default";
-			pinctrl-0 = <&uart3m1_xfer>;
-		};
-	};
-
-	fragment@1 {
-		target = <&uart3>;
+&fiq_debugger {
+	status = "okay";
+	rockchip,serial-id = <3>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart3m1_xfer>;
+};
 
-		__overlay__ {
-			status = "disabled";
-		};
-	};
+&uart3 {
+	status = "disabled";
 };
diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3588-fiq-debugger-uart4m2.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3588-fiq-debugger-uart4m2.dts
@@ -9,23 +9,15 @@
 		exclusive = "GPIO1_B3", "GPIO1_B2";
 		description = "Enable FIQ Debugger on UART4-M2.\nOn Radxa ROCK 5A this is TX pin 7 and RX pin 29.\nOn Radxa ROCK 5B this is TX pin 7 & RX pin 29.";
 	};
+};
 
-	fragment@0 {
-		target = <&fiq_debugger>;
-
-		__overlay__ {
-			status = "okay";
-			rockchip,serial-id = <4>;
-			pinctrl-names = "default";
-			pinctrl-0 = <&uart4m2_xfer>;
-		};
-	};
-
-	fragment@1 {
-		target = <&uart4>;
+&fiq_debugger {
+	status = "okay";
+	rockchip,serial-id = <4>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart4m2_xfer>;
+};
 
-		__overlay__ {
-			status = "disabled";
-		};
-	};
+&uart4 {
+	status = "disabled";
 };
diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3588-fiq-debugger-uart6m1.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3588-fiq-debugger-uart6m1.dts
@@ -9,23 +9,15 @@
 		exclusive = "GPIO1_A1", "GPIO1_A0";
 		description = "Enable FIQ Debugger on UART6-M1.\nOn Radxa ROCK 5A this is TX pin 19 and RX pin 21.";
 	};
+};
 
-	fragment@0 {
-		target = <&fiq_debugger>;
-
-		__overlay__ {
-			status = "okay";
-			rockchip,serial-id = <6>;
-			pinctrl-names = "default";
-			pinctrl-0 = <&uart6m1_xfer>;
-		};
-	};
-
-	fragment@1 {
-		target = <&uart6>;
+&fiq_debugger {
+	status = "okay";
+	rockchip,serial-id = <6>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart6m1_xfer>;
+};
 
-		__overlay__ {
-			status = "disabled";
-		};
-	};
+&uart6 {
+	status = "disabled";
 };
diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3588-fiq-debugger-uart7m1.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3588-fiq-debugger-uart7m1.dts
@@ -9,23 +9,15 @@
 		exclusive = "GPIO3_C1", "GPIO3_C0";
 		description = "Enable FIQ Debugger on UART7-M1.\nOn Radxa ROCK 5B this is TX pin 15 & RX pin 11.\nOn Radxa ROCK 5B+ this is TX pin 15 & RX pin 11.";
 	};
+};
 
-	fragment@0 {
-		target = <&fiq_debugger>;
-
-		__overlay__ {
-			status = "okay";
-			rockchip,serial-id = <7>;
-			pinctrl-names = "default";
-			pinctrl-0 = <&uart7m1_xfer>;
-		};
-	};
-
-	fragment@1 {
-		target = <&uart7>;
+&fiq_debugger {
+	status = "okay";
+	rockchip,serial-id = <7>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart7m1_xfer>;
+};
 
-		__overlay__ {
-			status = "disabled";
-		};
-	};
+&uart7 {
+	status = "disabled";
 };