WIP CAN Driver

CR-Formula · Sep 7, 2024 · a44e6fc · a44e6fc
1 parent 1a26239
commit a44e6fc
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Showing 3 changed files with 8 additions and 6 deletions.
diff --git a/Core/Inc/FreeRTOSConfig.h b/Core/Inc/FreeRTOSConfig.h
@@ -57,7 +57,7 @@
 #define CMSIS_device_header "stm32f4xx.h"
 #endif /* CMSIS_device_header */
 
-#define configENABLE_FPU                         0
+#define configENABLE_FPU                         1
 #define configENABLE_MPU                         0
 
 #define configUSE_PREEMPTION                     1

diff --git a/Core/Src/can.c b/Core/Src/can.c
@@ -43,14 +43,16 @@ CAN_Status CAN1_Init() {
     CAN1_State = CAN_State_Initialization;
 
     // Configure CAN1 Settings
-    CAN1->MCR &= ~CAN_MCR_TXFP & ~CAN_MCR_NART & ~CAN_MCR_RFLM 
-                & ~CAN_MCR_TTCM & ~CAN_MCR_ABOM & ~CAN_MCR_TXFP;
-    CAN1->MCR |= CAN_MCR_AWUM;
+    CAN1->MCR &= ~CAN_MCR_TXFP & ~CAN_MCR_RFLM & ~CAN_MCR_TTCM 
+                & ~CAN_MCR_ABOM & ~CAN_MCR_TXFP;
+    CAN1->MCR |= CAN_MCR_AWUM | CAN_MCR_NART | CAN_MCR_DBF;
 
     // Configure CAN1 Baud Rate
     // http://www.bittiming.can-wiki.info/
     CAN1->BTR &= ~CAN_BTR_SILM & ~CAN_BTR_LBKM; // Disable Silent and Loopback Mode
-    CAN1->BTR |= CAN_BTR_LBKM;
+    // CAN1->BTR |= CAN_BTR_LBKM;
+    CAN1->BTR &= ~CAN_BTR_TS1_Msk & ~CAN_BTR_TS2_Msk 
+                & ~CAN_BTR_SJW_Msk & ~CAN_BTR_BRP_Msk;
     CAN1->BTR |= (0xA << CAN_BTR_TS1_Pos) | (0x1 << CAN_BTR_TS2_Pos) 
                 | (0x0 << CAN_BTR_SJW_Pos) | (0x5 << CAN_BTR_BRP_Pos);
 

diff --git a/Core/Src/sysclk.c b/Core/Src/sysclk.c
@@ -29,7 +29,7 @@ void Sysclk_168() {
     RCC->PLLCFGR |= 0 << RCC_PLLCFGR_PLLP_Pos; // Set PLLP to 2
     RCC->PLLCFGR |= 168 << RCC_PLLCFGR_PLLN_Pos; // Set PLLN to 336
     RCC->PLLCFGR |= 8 << RCC_PLLCFGR_PLLM_Pos; // Set PLLM to 8
-    RCC->PLLCFGR |= RCC_PLLCFGR_PLLSRC_HSE; // Set PLL Source to HSE
+    RCC->PLLCFGR |= RCC_PLLCFGR_PLLSRC_HSI; // Set PLL Source to HSE
 
     FLASH->ACR |= FLASH_ACR_PRFTEN; // Enable Prefetch Buffer
     FLASH->ACR |= FLASH_ACR_ICEN; // Enable Instruction Cache