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Chip2chip #43
base: driver_chip2chip
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Chip2chip #43
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Please resolve the conflict in Makefile. |
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I will check source code later.
ifeq ($(USE_CHIP2CHIP_DEVICE), 1) | ||
chip2chip-test.out : $(UNITY_ROOT)/src/unity.c $(DEVICE_SRCS) ./test/chip2chip-test.c | ||
$(CC) $(MACROS) $(CFLAGS) $(INCLUDES) -o $@ $^ $(LIBS) | ||
endif |
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Could you attach your testing result?
…ip_clear() in chip2chip_open()
…ar error in wait_flash_operation function.
# Debug Setting | ||
USE_DEBUG = 0 | ||
USE_DEBUG = 1 |
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Please revert this to zero
@@ -30,8 +30,9 @@ DOCKER_TAG_ROOT = ftl | |||
# Device Module Setting | |||
USE_ZONE_DEVICE = 0 | |||
USE_BLUEDBM_DEVICE = 0 | |||
USE_CHIP2CHIP_DEVICE = 1 |
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Please revert this to zero
Makefile
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#-DUSER_MODE \ | ||
-DUSE_PMU \ | ||
-DUSE_KTIMER \ | ||
-DUSE_NEW_RMW \ | ||
-D_LARGEFILE64_SOURCE \ | ||
-D_GNU_SOURCE \ | ||
-DNOHOST |
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Remove the unnecessary comment.
device/chip2chip/chip2chip_base.c
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/*Ÿ�� ī��Ʈ ��==0 �̸� �ݺ��� break*/ | ||
while(time_cnt-- != 0){ | ||
/* read queue ready ��ȣ�� ����� (ready7, ready6, ready5, ..., ready0) */ | ||
readQ_ready = CTC_In(rgstr_vptr.read_stat) & READQ_READY_MASK; |
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#define READ_READY_QUEUE(rgstr_vptr) CTC_In(rgstr_vptr) & READQ_READY_MASK;
is_ready = READ_READY_QUEUE(rgstr_vptr);
device/chip2chip/chip2chip_base.c
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readQ_tag = CTC_In(rgstr_vptr.read_stat) & READQ_TAG_MASK; | ||
//readQ_tag = Xil_In64(C2C_READ_STATUS_ADDR) & READQ_TAG_MASK; | ||
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||
if((readQ_ready&READ_DATA0_READY_VALUE)>0) // if read queue0�� ready ��ȣ�� 1�� �� |
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For example,
if you want to avoid stack growth, then please use the
static inline
.
https://github.com/BlaCkinkGJ/Flash-Translation-Layer/blob/d74f061520ea7ce629074e4166929c06c9a14631/include/page.h#L101C1-L104
const int read_ready_values[] = {
READ_DATA0_READY_VALUE,
READ_DATA1_READY_VALUE,
READ_DATA2_READY_VALUE,
READ_DATA3_READY_VALUE,
READ_DATA4_READY_VALUE,
READ_DATA5_READY_VALUE,
READ_DATA6_READY_VALUE,
READ_DATA7_READY_VALUE,
}
#define NUM_ITEMS(s) sizeof(s)/sizeof(s[0])
for (int i = 0; i < NUM_ITEMS(read_ready_values); i++) {
if((readQ_read & read_ready_values[i]) > 0 ) { // you can make this part to a function.
...
}
}
device/chip2chip/chip2chip_base.c
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|
||
int wait_cmd_ready(void){ | ||
int time_cnt = MAX_CMD_RDY_WAIT_CNT; | ||
/* command �����Ϳ��� 64-bit�� �о� �� �� command ready ���� ����� �� command ready ���� 0�̸� �ݺ�*/ |
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Please delete all comments.
include/chip2chip_base.h
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#define READ_DATA6_READY_VALUE 0x0080000000000000 | ||
#define READ_DATA7_READY_VALUE 0x8000000000000000 | ||
#define READ_DATA0_TAG_MASK 0x000000000000007f | ||
#define READ_DATA1_TAG_MASK 0x0000000000007f00 |
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#define READ_DATA0_TAG_MASK (0x7f<<0)
#define READ_DATA1_TAG_MASK (0x7f<<8)
#define READ_DATA2_TAG_MASK (0x7f<<16)
include/chip2chip_base.h
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struct _rgstr_vptr { | ||
u64 *cmd; //Command register | ||
u64 *read_stat; //Read status register | ||
u64 *read_data_0u; //Read data upper register | ||
u64 *read_data_0l; //Read data lower register | ||
u64 *read_data_1u; | ||
u64 *read_data_1l; | ||
u64 *read_data_2u; | ||
u64 *read_data_2l; | ||
u64 *read_data_3u; | ||
u64 *read_data_3l; | ||
u64 *read_data_4u; | ||
u64 *read_data_4l; | ||
u64 *read_data_5u; | ||
u64 *read_data_5l; | ||
u64 *read_data_6u; | ||
u64 *read_data_6l; | ||
u64 *read_data_7u; | ||
u64 *read_data_7l; | ||
u64 *wne_stat; //Write and erase status register | ||
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||
u64 *write_data_u; //Write data upper register | ||
u64 *write_data_l; //Write data lower register | ||
}; |
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#include <stdio.h>
#include <inttypes.h>
struct address {
union {
struct {
uint64_t page:16;
uint64_t block:16;
uint64_t chip:16;
uint64_t bus:16;
} format;
uint64_t cmd;
};
};
int main(void) {
struct address addr;
addr.cmd = 0;
addr.format.page = 1;
addr.format.block = 2;
addr.format.chip = 1;
addr.format.bus = 16;
printf("0x%lx\n", addr.cmd);
return 0;
}
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Need to be changed
…92 from page_size/2. This is temporary solution and needs to be rollbacked.
JFYI, you must check whether you can access the OOB(Out-Of-Bound) area. While I was doing the personal project, I found that a NAND chip can suffer from data corruption more than I expected. Generally, SLC can be corrupted a single bit. Over SLC(e.g., MLC, TLC), they can be corrupted more than a bit. In other words, if you cannot implement the ECC logic, you might get invalid data from the NAND device. |
…operation at proper page.
…ting from 0 in ascending order.
I enabled Codacy static code analysis for your base branch. Please check it to improve your source code quality. |
…hen using chip2chip device.
…s OOB area for additional data storage. Otherwise, page size will be 8192.
…ch consists of 128 pages.
…the dirtyseg_bitmap open.
Have created chip2chip device codes based on Bluedbm codes.
Creation and modification have started from the main branch.
Codes that were used when porting chip2chip interface to the Ubuntu for ZCU102 in the first place
are named as chip2chip_base.*.
These are not working properly at this moment, and need a lot of work to be done.
I recommend merging this request to a separate branch.