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A Tic-Tac-Toe written in Verilog for implementation in FPGA

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Verilog Tic-Tac-Toe for FPGA

Jun-Yu (Andrew) Chen

Introduction

A Tic-Tac-Toe game written in Verilog for implementation in FPGA, incorporating MCTS searching methods for game AI position selection. Two modes are incorporated: One where the AI never loses and one where mistakes could be made and enabling player victory.

Module Structure

Structure

Requirements

Releases of .rbf and .pkg are based on the VeriInstrument SImulator by SMIMS for Altera Cyclone EP1C6Q240.
However the given code should be able to compile with Quartus II and be run on any selectable FPGA board.

User Interface (In Simulator)

Demo

Verilog_TicTacToe.mp4

References

[1] C. Browne, "UCT for PCG," 2013 IEEE Conference on Computational Inteligence in Games (CIG) CIG), Niagara Falls, ON, 2013, pp. 1~8.

[2] J. Togelius , G. N. Yannakakis , K. O. Stanley and C. Browne, "Search Based Procedural Content Generation: A Taxonomy and Survey," in IEEE Transactions on Computational Intelligence and AI in Games , vol. 3, no. 3, pp. 172~186, Sept. 2011.

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A Tic-Tac-Toe written in Verilog for implementation in FPGA

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