imx8qm-var-som: enable PHY reference clock for PCIe

Enable the configuration for the PHY reference clock pad mode for PCIe on the imx8qm-var-som-symphony carrier board. Cleans up the PCIe configuration by removing the `ext_osc` parameter to align with NXP mek board. Signed-off-by: Diego Dorta <[email protected]>
AusEnergyResearchLabs · Apr 8, 2024 · dd01990 · dd01990
1 parent 7a5e7f4
commit dd01990
Showing 1 changed file with 5 additions and 1 deletion.
diff --git a/arch/arm64/boot/dts/freescale/imx8qm-var-som-symphony.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-var-som-symphony.dtsi
@@ -676,8 +676,12 @@
 	status = "disabled";
 };
 
+&phyx2_0{
+       fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
+       status = "okay";
+};
+
 &pciea{
-	ext_osc = <1>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pciea>;
 	reset-gpio = <&lsio_gpio3 14 GPIO_ACTIVE_LOW>;