Over the last few years, I have been serving in the semiconductor industry as a hardware verification engineer. I have developed expertise in verification methodologies like UVM, System Verilog, Functional verification, Functional coverages, Python, PCIe, and CXL. I have gained considerable knowledge in the field of semiconductors.
Design Verification Engineer - MERL | UVM | RISC V | System Verilog | OOP | FPGA | ASIC | Hardware | Verification | Semiconductors | VLSI | SoC | Open source
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Microelectronics Research Laboratory - MERL
- Karachi, Pakistan
- https://www.linkedin.com/in/auringzaib-sabir/
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azadi-verify
azadi-verify PublicForked from merledu/azadi-verify
This repository contains tests (in C and assembly both), benchmarks and the test-benches for the verification of Azadi SoC.
Assembly
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common_peripheral_vips
common_peripheral_vips PublicForked from merledu/common_peripheral_vips
SystemVerilog
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uvm_sample
uvm_sample PublicThis repository contains a sample code of the UVM environment. Use this code as a reference for writing a complex UVM framework.
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