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Some code rewrites.
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* Debug Mode setting now actually does something. :P
* R4, M3DS Real, and DSXtreme now boot correctly.
* Many more flashcarts that weren't working probably work now.
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ApacheThunder committed Sep 19, 2023
1 parent b8c2dec commit e3a7cfb
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Showing 23 changed files with 1,967 additions and 178 deletions.
15 changes: 7 additions & 8 deletions BootLoader/source/main.arm7.c
Original file line number Diff line number Diff line change
Expand Up @@ -809,16 +809,15 @@ void arm7_main (void) {
arm9_ExtendRam = extendRam;

if (twlClock) {
if (!sdAccess) { REG_SCFG_CLK = 0x0186; } else { REG_SCFG_CLK = 0x0187; }
// if (!sdAccess) { REG_SCFG_CLK = 0x0186; } else { REG_SCFG_CLK = 0x0187; }
REG_SCFG_CLK = 0x0185;
} else {
if (!sdAccess) { REG_SCFG_CLK = 0x0180; } else { REG_SCFG_CLK = 0x0181; }
// if (!sdAccess) { REG_SCFG_CLK = 0x0180; } else { REG_SCFG_CLK = 0x0181; }
REG_SCFG_CLK = 0x0101;
}

if (twlMode) { REG_SCFG_EXT = 0x92FBFB06; } else { REG_SCFG_EXT = 0x92A00000; }

if (sdAccess) { REG_SCFG_EXT |= BIT(18); }

if (!scfgUnlock) { REG_SCFG_EXT &= ~(1UL << 31); }
if (twlMode) { REG_SCFG_EXT = 0x92FBFB06; } else { REG_SCFG_EXT = 0x92A00000; }
// if (sdAccess) { REG_SCFG_EXT |= BIT(18); }
if (scfgUnlock) { REG_SCFG_EXT |= BIT(18); } else { REG_SCFG_EXT &= ~(1UL << 31); }

while (arm9_stateFlag != ARM9_READY);
arm9_stateFlag = ARM9_SETSCFG;
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13 changes: 5 additions & 8 deletions BootLoader/source/main.arm9.c
Original file line number Diff line number Diff line change
Expand Up @@ -132,7 +132,7 @@ static void arm9_errorOutput (u32 code, bool clearBG) {
int i, j, k;
u16 colour;

REG_POWERCNT = POWER_LCD | POWER_2D_A;
REG_POWERCNT = (u16)(POWER_LCD | POWER_2D_A);
REG_DISPCNT = MODE_FB0;
VRAM_A_CR = VRAM_ENABLE;

Expand Down Expand Up @@ -311,25 +311,22 @@ void __attribute__((target("arm"))) arm9_main (void) {
while(REG_VCOUNT!=191);
while(REG_VCOUNT==191);

REG_SCFG_CLK = 0x80;
if (arm9_TWLClockSpeeds) { REG_SCFG_CLK |= BIT(0); }
if (arm9_dsiModeConfirmed) {
REG_SCFG_EXT = 0x8207F100;
REG_SCFG_CLK = 0x0084;
if (arm9_TWLClockSpeeds) { REG_SCFG_CLK |= BIT(0); }
REG_SCFG_RST = 1;
} else {
// REG_SCFG_EXT = 0x8200C000;
REG_SCFG_EXT=0x82000000;
REG_SCFG_CLK = 0x80;
if (arm9_TWLClockSpeeds) { REG_SCFG_CLK |= BIT(0); }

if (arm9_ExtendRam) {
REG_SCFG_EXT |= BIT(14);
REG_SCFG_EXT |= BIT(15);
}
// Extended VRAM Access
if (arm9_boostVram) { REG_SCFG_EXT |= BIT(13); }
if (arm9_boostVram)REG_SCFG_EXT |= BIT(13);
// lock SCFG
if (!arm9_scfgUnlock) { REG_SCFG_EXT &= ~(1UL << 31); }
if (!arm9_scfgUnlock)REG_SCFG_EXT &= ~(1UL << 31);
}

// wait for vblank then boot
Expand Down
2 changes: 2 additions & 0 deletions BootLoaderAlt/source/common.h
Original file line number Diff line number Diff line change
Expand Up @@ -26,6 +26,8 @@
#define resetCpu() \
__asm volatile("swi 0x000000")

extern bool arm9_DebugMode;

typedef enum { ERR_NONE=0x00, ERR_STS_CLR_MEM=0x01, ERR_STS_LOAD_BIN=0x02, ERR_STS_HOOK_BIN=0x03, ERR_STS_START=0x04,
// initCard error codes:
ERR_LOAD_NORM=0x11, ERR_LOAD_OTHR=0x12, ERR_SEC_NORM=0x13, ERR_SEC_OTHR=0x14, ERR_LOGO_CRC=0x15, ERR_HEAD_CRC=0x16,
Expand Down
31 changes: 31 additions & 0 deletions BootLoaderAlt/source/launch_ds_crt0.s
Original file line number Diff line number Diff line change
@@ -1,12 +1,43 @@
@---------------------------------------------------------------------------------
.section ".init"
.global _start
.global dsiMode
.global language
.global sdAccess
.global scfgUnlock
.global twlMode
.global twlClock
.global boostVram
.global soundFreq
.global extendRam
.global debugMode
@---------------------------------------------------------------------------------
.align 4
.arm
@---------------------------------------------------------------------------------
_start:
@---------------------------------------------------------------------------------
dsiMode:
.word 0x00000000
language:
.word 0x00000000
sdAccess:
.word 0x00000000
scfgUnlock:
.word 0x00000000
twlMode:
.word 0x00000000
twlClock:
.word 0x00000000
boostVram:
.word 0x00000000
soundFreq:
.word 0x00000000
extendRam:
.word 0x00000000
debugMode:
.word 0x00000000

mov r0, #0x04000000
mov r1, #0
str r1, [r0,#0x208] @ REG_IME
Expand Down
42 changes: 25 additions & 17 deletions BootLoaderAlt/source/main.arm7.c
Original file line number Diff line number Diff line change
Expand Up @@ -39,11 +39,6 @@
#include <nds/ipc.h>
#include <string.h>

// #include <nds/registers_alt.h>
// #include <nds/memory.h>
// #include <nds/card.h>
// #include <stdio.h>

#ifndef NULL
#define NULL 0
#endif
Expand All @@ -57,22 +52,32 @@ External functions
extern void arm7_clearmem (void* loc, size_t len);
extern void arm7_reset (void);

extern u32 dsiMode;
extern u32 language;
extern u32 sdAccess;
extern u32 scfgUnlock;
extern u32 twlMode;
extern u32 twlClock;
extern u32 boostVram;
extern u32 soundFreq;
extern u32 extendRam;
extern u32 debugMode;

//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
// Important things
#define NDS_HEAD 0x027FFE00
tNDSHeader* ndsHeader = (tNDSHeader*)NDS_HEAD;

//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
// Used for debugging purposes
/* Disabled for now. Re-enable to debug problems
static void errorOutput (u32 code) {
// Set the error code, then set our state to "error"
arm9_errorCode = code;
ipcSendState(ARM7_ERR);
// Stop
while(1);
}
*/


//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
// Firmware stuff
Expand Down Expand Up @@ -426,7 +431,9 @@ static void NDSTouchscreenMode(void) {
// Main function

void arm7_main (void) {


arm9_DebugMode = debugMode;

NDSTouchscreenMode();
*(u16*)0x4000500 = 0x807F;

Expand All @@ -440,20 +447,22 @@ void arm7_main (void) {
REG_MBK7=0x09803940;
REG_MBK8=0x09C03980;
REG_MBK9=0xFCFFFF0F;

REG_SCFG_ROM = 0x703;
REG_SCFG_EXT = 0x92A00000;
REG_SCFG_EXT &= ~(1UL << 31);


if (twlClock) { REG_SCFG_CLK = 0x0185; } else { REG_SCFG_CLK = 0x0101; }
if (scfgUnlock) { REG_SCFG_EXT |= BIT(18); } else { REG_SCFG_EXT &= ~(1UL << 31); }

int errorCode;

// Synchronise start
while (ipcRecvState() != ARM9_START);
while (ipcRecvState() != ARM9_START) { }

ipcSendState(ARM7_START);

// Wait until ARM9 is ready
while (ipcRecvState() != ARM9_READY);
while (ipcRecvState() != ARM9_READY) { }

ipcSendState(ARM7_MEMCLR);

Expand All @@ -463,14 +472,13 @@ void arm7_main (void) {
ipcSendState(ARM7_LOADBIN);

// Load the NDS file

errorCode = arm7_loadBinary();

/*if (errorCode) {
// errorOutput(errorCode);
}*/
if (errorCode & arm9_DebugMode) errorOutput(errorCode);

ipcSendState(ARM7_BOOTBIN);

arm7_reset();
}

Expand Down
30 changes: 13 additions & 17 deletions BootLoaderAlt/source/main.arm9.c
Original file line number Diff line number Diff line change
Expand Up @@ -42,6 +42,8 @@

#include "common.h"

bool arm9_DebugMode = false;

volatile int arm9_stateFlag = ARM9_BOOT;
volatile u32 arm9_errorCode = 0xFFFFFFFF;
volatile bool arm9_errorClearBG = false;
Expand All @@ -62,19 +64,17 @@ Red = 00, Yellow = 01, Green = 10, Blue = 11
Written by Chishm
--------------------------------------------------------------------------*/
/* Re-enable for debugging.

static void arm9_errorOutput (u32 code) {
int i, j, k;
u16 colour;

REG_POWERCNT = POWER_LCD | POWER_2D_A;
REG_POWERCNT = (u16)(POWER_LCD | POWER_2D_A);
REG_DISPCNT = MODE_FB0;
VRAM_A_CR = VRAM_ENABLE;

// Clear display
for (i = 0; i < 256*192; i++) {
VRAM_A[i] = 0x0000;
}
for (i = 0; i < 256*192; i++) { VRAM_A[i] = 0x0000; }

// Draw boxes of colour, signifying error codes

Expand Down Expand Up @@ -116,7 +116,6 @@ static void arm9_errorOutput (u32 code) {
}
}
}
*/

/*-------------------------------------------------------------------------
arm9_main
Expand Down Expand Up @@ -212,21 +211,18 @@ void arm9_main (void) {
VRAM_I_CR = 0;
REG_POWERCNT = 0x820F;


// set ARM9 state to ready and wait for instructions from ARM7
ipcSendState(ARM9_READY);
// Re-enable for debugging
/*
while (ipcRecvState() != ARM7_BOOTBIN) {
if (ipcRecvState() == ARM7_ERR) {
arm9_errorOutput (arm9_errorCode);
// Halt after displaying error code
while(1);

if (arm9_DebugMode) {
while (ipcRecvState() != ARM7_BOOTBIN) {
if (ipcRecvState() == ARM7_ERR) {
arm9_errorOutput (arm9_errorCode);
// Halt after displaying error code
while(1);
}
}
}
*/

// arm9_errorOutput (*(u32*)(first), true);

arm9_reset();
}
Expand Down
4 changes: 2 additions & 2 deletions Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -13,7 +13,7 @@ export TARGET := NTR_Launcher
export TOPDIR := $(CURDIR)

export VERSION_MAJOR := 2
export VERSION_MINOR := 5
export VERSION_MINOR := 6
export VERSTRING := $(VERSION_MAJOR).$(VERSION_MINOR)

.PHONY: bootloader bootloaderAlt clean arm7/$(TARGET).elf arm9/$(TARGET).elf
Expand All @@ -25,14 +25,14 @@ all: bootloader bootloaderAlt $(TARGET).nds

dist: all
@mkdir -p debug
@cp $(TARGET).nds 00000000.app
@cp $(TARGET).arm7.elf debug/$(TARGET).arm7.elf
@cp $(TARGET).arm9.elf debug/$(TARGET).arm9.elf

$(TARGET).nds: $(TARGET).arm7 $(TARGET).arm9
ndstool -c $(TARGET).nds -7 $(TARGET).arm7.elf -9 $(TARGET).arm9.elf \
-b $(CURDIR)/icon.bmp "NTR Launcher;Slot-1 Launcher;Apache Thunder & RocketRobz" \
-g KKGP 01 "NTR Launcher" -z 80040000 -u 00030004 -a 00000038 -p 0001
@cp $(TARGET).nds 00000000.app

$(TARGET).arm7 : arm7/$(TARGET).elf
cp arm7/$(TARGET).elf $(TARGET).arm7.elf
Expand Down
1 change: 0 additions & 1 deletion NTR_Launcher.ini
Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,6 @@ TWLEXTRAM = 0
TWLMODE = 0
SOUNDFREQ = 0
SCFGUNLOCK = 0
RESETSLOT1 = 0
ANIMATEDSPLASH = 0
NTRSPLASH = 0
HEALTHSAFETYSPLASH = 1
Expand Down
49 changes: 11 additions & 38 deletions arm7/source/main.c
Original file line number Diff line number Diff line change
Expand Up @@ -22,37 +22,21 @@

#include <maxmod7.h>

void VcountHandler() { inputGetAndSend(); }
void VblankHandler(void) { }

int PowerOnSlot() {
REG_SCFG_MC = 0x04; // set state=1
while(REG_SCFG_MC&1);

REG_SCFG_MC = 0x08; // set state=2
while(REG_SCFG_MC&1);

REG_ROMCTRL = 0x20000000; // set ROMCTRL=20000000h
return 0;
}
bool SCFGCLKCheck = false;

int PowerOffSlot() {
if(REG_SCFG_MC&1) return 1;

REG_SCFG_MC = 0x0C; // set state=3
while(REG_SCFG_MC&1);
return 0;
}
void VcountHandler() { inputGetAndSend(); }

int TWL_ResetSlot1() {
PowerOffSlot();
for (int i = 0; i < 30; i++) { swiWaitForVBlank(); }
PowerOnSlot();
return 0;
}
void VblankHandler(void) {
if (!SCFGCLKCheck) {
if (fifoCheckValue32(FIFO_USER_01)) {
SCFGCLKCheck = true;
REG_SCFG_CLK = 0x0180;
fifoSendValue32(FIFO_USER_02, 1);
}
}
}

int main(void) {

// read User Settings from firmware
readUserSettings();
irqInit();
Expand All @@ -76,17 +60,6 @@ int main(void) {
i2cWriteRegister(0x4A, 0x12, 0x00); // Press power-button for auto-reset
i2cWriteRegister(0x4A, 0x70, 0x01); // Bootflag = Warmboot/SkipHealthSafety

// Make sure Arm9 had a chance to check slot status
fifoWaitValue32(FIFO_USER_01);

if(fifoCheckValue32(FIFO_USER_02)) {
if(fifoCheckValue32(FIFO_USER_04)) { TWL_ResetSlot1(); } else { PowerOnSlot(); }
}

if (fifoCheckValue32(FIFO_USER_05)) { REG_SCFG_CLK = 0x0180; }

fifoSendValue32(FIFO_USER_03, 1);

while (1) { swiWaitForVBlank(); }
}

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