- The EF_ADCS0808NSC is a low-power, 8-channel CMOS 8-bit analogue-to-digital converter with a flexible parallel interface. Moreover, start-of-conversion (SOC) and end-of-conversion (EOC) terminals facilitate the sample rate operating range. The converter is based on a successive-approximation register (SAR) architecture with an internal track-and-hold circuit. It can be configured to accept a 2.5 V single-ended input span. The output parallel data is binary and compatible with many common DSP parallel interfaces. The EF_ADCS0808NSC operates with a dual power supply; 1.8 V and 3.3 V supply the digital and analogue IP blocks, respectively. Normal power consumption reaches 0.92 mW in idle mode. The functional block diagram is presented in Figure 1.
Figure 1. Functional Block Diagram