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Updated examples
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Some examples were not working.
Updated all examples for use of Arm Virtual Hardware instead of FVP.
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@christophe0606
christophe0606 committed Jul 4, 2022
1 parent d1c7be7 commit 3395b5d
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Showing 41 changed files with 600 additions and 544 deletions.
22 changes: 11 additions & 11 deletions Examples/ARM/arm_bayes_example/ARMCM55_FP_MVE_config.txt
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Original file line number Diff line number Diff line change
Expand Up @@ -8,18 +8,18 @@ cpu0.min_sync_level=3 # (int , run-time ) defa
cpu0.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
cpu0.MVE=2 # (int , init-time) default = '0x1' : Set whether the model has MVE support. If FPU = 0: 0=MVE not included, 1=Integer subset of MVE included. If FPU = 1: 0=MVE not included, 1=Integer subset of MVE included, 2=Integer and half and single precision floating point MVE included
cpu0.SAU=0 # (int , init-time) default = '0x8' : Number of SAU regions (0 => no SAU)
cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included
cpu0.SECEXT=1 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included
cpu0.INITSVTOR=0 # (int , init-time) default = '0x10000000' : Secure vector-table offset at reset
cpu0.INITNSVTOR=0 # (int , init-time) default = '0x0' : Non-Secure vector-table offset at reset
#
cpu1.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
cpu1.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction)
cpu1.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction)
cpu1.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll)
cpu1.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
cpu1.MVE=2 # (int , init-time) default = '0x1' : Set whether the model has MVE support. If FPU = 0: 0=MVE not included, 1=Integer subset of MVE included. If FPU = 1: 0=MVE not included, 1=Integer subset of MVE included, 2=Integer and half and single precision floating point MVE included
cpu1.SAU=0 # (int , init-time) default = '0x8' : Number of SAU regions (0 => no SAU)
cpu1.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included
cpu1.INITSVTOR=0 # (int , init-time) default = '0x10000000' : Secure vector-table offset at reset
cpu1.INITNSVTOR=0 # (int , init-time) default = '0x0' : Non-Secure vector-table offset at reset
#cpu1.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
#cpu1.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction)
#cpu1.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction)
#cpu1.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll)
#cpu1.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
#cpu1.MVE=2 # (int , init-time) default = '0x1' : Set whether the model has MVE support. If FPU = 0: 0=MVE not included, 1=Integer subset of MVE included. If FPU = 1: 0=MVE not included, 1=Integer subset of MVE included, 2=Integer and half and single precision floating point MVE included
#cpu1.SAU=0 # (int , init-time) default = '0x8' : Number of SAU regions (0 => no SAU)
#cpu1.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included
#cpu1.INITSVTOR=0 # (int , init-time) default = '0x10000000' : Secure vector-table offset at reset
#cpu1.INITNSVTOR=0 # (int , init-time) default = '0x0' : Non-Secure vector-table offset at reset
#------------------------------------------------------------------------------
2 changes: 1 addition & 1 deletion Examples/ARM/arm_bayes_example/RTE/Device/ARMCM55/ARMCM55_ac6.sct
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Original file line number Diff line number Diff line change
Expand Up @@ -37,7 +37,7 @@
; <o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
*----------------------------------------------------------------------------*/
#define __STACK_SIZE 0x00000200
#define __STACK_SIZE 0x00001000
#define __HEAP_SIZE 0x00000C00

/*
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72 changes: 52 additions & 20 deletions Examples/ARM/arm_bayes_example/arm_bayes_example.uvoptx
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Original file line number Diff line number Diff line change
Expand Up @@ -130,7 +130,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DbgFM</Key>
<Name>-I -S"System Generator:FVP_MPS2_Cortex_M0_MDK" -L"armcortexm0ct" -O12294 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M0_MDK.exe" -MF".\ARMCM0_config.txt" -MA -PF".\MTICoverageOut.cov"</Name>
<Name>-I -S"System Generator:FVP_MPS2_Cortex_M0_MDK" -L"armcortexm0ct" -O4102 -C0 -MC"$K\ARM\VHT\VHT_MPS2_Cortex-M0_MDK.exe" -MF".\ARMCM0_config.txt" -PF -MA</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
Expand Down Expand Up @@ -162,9 +162,9 @@
<Bp>
<Number>0</Number>
<Type>0</Type>
<LineNumber>138</LineNumber>
<LineNumber>143</LineNumber>
<EnabledFlag>1</EnabledFlag>
<Address>1676</Address>
<Address>1636</Address>
<ByteObject>0</ByteObject>
<HtxType>0</HtxType>
<ManyObjects>0</ManyObjects>
Expand All @@ -173,7 +173,7 @@
<BreakIfRCount>1</BreakIfRCount>
<Filename>.\arm_bayes_example_f32.c</Filename>
<ExecCommand></ExecCommand>
<Expression>\\arm_bayes_example\arm_bayes_example_f32.c\138</Expression>
<Expression>\\arm_bayes_example\arm_bayes_example_f32.c\143</Expression>
</Bp>
</Breakpoint>
<WatchWindow1>
Expand All @@ -183,6 +183,14 @@
<ItemText>Dbg_Index</ItemText>
</Ww>
</WatchWindow1>
<MemoryWindow1>
<Mm>
<WinNumber>1</WinNumber>
<SubType>2</SubType>
<ItemText>index</ItemText>
<AccSizeX>0</AccSizeX>
</Mm>
</MemoryWindow1>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
Expand Down Expand Up @@ -337,7 +345,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DbgFM</Key>
<Name>-I -S"System Generator:FVP_MPS2_Cortex_M3_MDK" -L"armcortexm3ct" -O12294 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M3_MDK.exe" -MF".\ARMCM3_config.txt" -MA -PF".\MTICoverageOut.cov"</Name>
<Name>-I -S"System Generator:FVP_MPS2_Cortex_M3_MDK" -L"armcortexm3ct" -O12294 -C0 -MC"$K\ARM\VHT\VHT_MPS2_Cortex-M3_MDK.exe" -MF".\ARMCM3_config.txt" -PF -MA</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
Expand Down Expand Up @@ -369,9 +377,9 @@
<Bp>
<Number>0</Number>
<Type>0</Type>
<LineNumber>138</LineNumber>
<LineNumber>143</LineNumber>
<EnabledFlag>1</EnabledFlag>
<Address>1760</Address>
<Address>1728</Address>
<ByteObject>0</ByteObject>
<HtxType>0</HtxType>
<ManyObjects>0</ManyObjects>
Expand All @@ -380,7 +388,7 @@
<BreakIfRCount>1</BreakIfRCount>
<Filename>.\arm_bayes_example_f32.c</Filename>
<ExecCommand></ExecCommand>
<Expression>\\arm_bayes_example\arm_bayes_example_f32.c\138</Expression>
<Expression>\\arm_bayes_example\arm_bayes_example_f32.c\143</Expression>
</Bp>
</Breakpoint>
<WatchWindow1>
Expand All @@ -390,6 +398,14 @@
<ItemText>Dbg_Index</ItemText>
</Ww>
</WatchWindow1>
<MemoryWindow1>
<Mm>
<WinNumber>1</WinNumber>
<SubType>2</SubType>
<ItemText>index</ItemText>
<AccSizeX>0</AccSizeX>
</Mm>
</MemoryWindow1>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
Expand Down Expand Up @@ -544,7 +560,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DbgFM</Key>
<Name>-I -S -L"armcortexm4ct" -O12294 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF".\ARMCM4_FP_config.txt" -MA -PF".\MTICoverageOut.cov"</Name>
<Name>-I -S -L"armcortexm4ct" -O12294 -C0 -MC"$K\ARM\VHT\VHT_MPS2_Cortex-M4_MDK.exe" -MF".\ARMCM4_FP_config.txt" -PF -MA</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
Expand Down Expand Up @@ -576,9 +592,9 @@
<Bp>
<Number>0</Number>
<Type>0</Type>
<LineNumber>138</LineNumber>
<LineNumber>143</LineNumber>
<EnabledFlag>1</EnabledFlag>
<Address>1622</Address>
<Address>1582</Address>
<ByteObject>0</ByteObject>
<HtxType>0</HtxType>
<ManyObjects>0</ManyObjects>
Expand All @@ -587,7 +603,7 @@
<BreakIfRCount>1</BreakIfRCount>
<Filename>.\arm_bayes_example_f32.c</Filename>
<ExecCommand></ExecCommand>
<Expression>\\arm_bayes_example\arm_bayes_example_f32.c\138</Expression>
<Expression>\\arm_bayes_example\arm_bayes_example_f32.c\143</Expression>
</Bp>
</Breakpoint>
<WatchWindow1>
Expand All @@ -597,6 +613,14 @@
<ItemText>Dbg_Index</ItemText>
</Ww>
</WatchWindow1>
<MemoryWindow1>
<Mm>
<WinNumber>1</WinNumber>
<SubType>2</SubType>
<ItemText>index</ItemText>
<AccSizeX>0</AccSizeX>
</Mm>
</MemoryWindow1>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
Expand Down Expand Up @@ -751,7 +775,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DbgFM</Key>
<Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O12294 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF".\ARMCM7_SP_config.txt" -MA -PF".\MTICoverageOut.cov"</Name>
<Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O12294 -C0 -MC"$K\ARM\VHT\VHT_MPS2_Cortex-M7_MDK.exe" -MF".\ARMCM7_SP_config.txt" -PF -MA</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
Expand Down Expand Up @@ -783,9 +807,9 @@
<Bp>
<Number>0</Number>
<Type>0</Type>
<LineNumber>138</LineNumber>
<LineNumber>143</LineNumber>
<EnabledFlag>1</EnabledFlag>
<Address>1772</Address>
<Address>1736</Address>
<ByteObject>0</ByteObject>
<HtxType>0</HtxType>
<ManyObjects>0</ManyObjects>
Expand All @@ -794,7 +818,7 @@
<BreakIfRCount>1</BreakIfRCount>
<Filename>.\arm_bayes_example_f32.c</Filename>
<ExecCommand></ExecCommand>
<Expression>\\arm_bayes_example\arm_bayes_example_f32.c\138</Expression>
<Expression>\\arm_bayes_example\arm_bayes_example_f32.c\143</Expression>
</Bp>
</Breakpoint>
<WatchWindow1>
Expand All @@ -804,6 +828,14 @@
<ItemText>Dbg_Index</ItemText>
</Ww>
</WatchWindow1>
<MemoryWindow1>
<Mm>
<WinNumber>1</WinNumber>
<SubType>2</SubType>
<ItemText>index</ItemText>
<AccSizeX>0</AccSizeX>
</Mm>
</MemoryWindow1>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
Expand Down Expand Up @@ -958,7 +990,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DbgFMv8M</Key>
<Name>-I -S -L"cpu0" -O12294 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M55_MDK.exe" -MF".\ARMCM55_FP_MVE_config.txt" -PF".\MTICoverageOut.cov" -MA</Name>
<Name>-I -S -L"cpu0" -O4102 -C0 -MC"$K\ARM\VHT\VHT_MPS3_Corstone_SSE-300.exe" -MF".\ARMCM55_FP_MVE_config.txt" -PF".\MTICoverageOut.cov" -MA</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
Expand Down Expand Up @@ -995,9 +1027,9 @@
<Bp>
<Number>0</Number>
<Type>0</Type>
<LineNumber>140</LineNumber>
<LineNumber>143</LineNumber>
<EnabledFlag>1</EnabledFlag>
<Address>3040</Address>
<Address>3892</Address>
<ByteObject>0</ByteObject>
<HtxType>0</HtxType>
<ManyObjects>0</ManyObjects>
Expand All @@ -1006,7 +1038,7 @@
<BreakIfRCount>1</BreakIfRCount>
<Filename>.\arm_bayes_example_f32.c</Filename>
<ExecCommand></ExecCommand>
<Expression>\\arm_bayes_example\arm_bayes_example_f32.c\140</Expression>
<Expression>\\arm_bayes_example\arm_bayes_example_f32.c\143</Expression>
</Bp>
</Breakpoint>
<WatchWindow1>
Expand Down
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