Digilent Arty Demo

All compiled FPGA bitfiles, edfs, and dcps to repeat the demo.

BFAT Litex Demo Files

BFAT Litex Demo Files
This is the bit, dcp, edf, and error json files needed for BFAT.

Pre Generated File for SpyDrNet-TMR example

Pre Generated File for SpyDrNet-TMR example.
This is a Linux-on-Litex Xilinx Vivado-generated EDIF file for Nexys Video.