Serialized, multifunction headstage for large rodents. Supports both 128 or 256 channels. Designed to interface with eib-128 or eib-256
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The BOM is located on this google sheet
The FPGA pinout is located on this google sheet
The headstage connector pinouts (ADC input mapping, stimulation connections, etc) ares are located on these google sheets:
Copyright Jonathan P. Newman 2018.
This documentation describes Open Hardware and is licensed under the CERN OHL v.1.2.
You may redistribute and modify this documentation under the terms of the CERN OHL v.1.2. (http://ohwr.org/cernohl). This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN OHL v.1.2 for applicable conditions