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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,21 @@ | ||
| if (TOOLCHAIN STREQUAL "gcc") | ||
| set(TOOLCHAIN_COMMON_FLAGS | ||
| -mcpu=arm1176jzf-s | ||
| -ffreestanding | ||
| ) | ||
| # set(FREERTOS_PORT GCC_ARM_CM0 CACHE INTERNAL "") | ||
|
|
||
| elseif (TOOLCHAIN STREQUAL "clang") | ||
| set(TOOLCHAIN_COMMON_FLAGS | ||
| --target=arm-none-eabi | ||
| -mcpu=arm1176jzf-s | ||
| -mfpu=none | ||
| -mfloat-abi=soft | ||
| -ffreestanding | ||
| ) | ||
| #set(FREERTOS_PORT GCC_ARM_CM0 CACHE INTERNAL "") | ||
|
|
||
| elseif (TOOLCHAIN STREQUAL "iar") | ||
| message(FATAL_ERROR "IAR not supported") | ||
|
|
||
| endif () |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,21 @@ | ||
| if (TOOLCHAIN STREQUAL "gcc") | ||
| set(TOOLCHAIN_COMMON_FLAGS | ||
| -mcpu=arm926ej-s | ||
| -ffreestanding | ||
| ) | ||
| # set(FREERTOS_PORT GCC_ARM_CM0 CACHE INTERNAL "") | ||
|
|
||
| elseif (TOOLCHAIN STREQUAL "clang") | ||
| set(TOOLCHAIN_COMMON_FLAGS | ||
| --target=arm-none-eabi | ||
| -mcpu=arm926ej-s | ||
| -mfpu=none | ||
| -mfloat-abi=soft | ||
| -ffreestanding | ||
| ) | ||
| #set(FREERTOS_PORT GCC_ARM_CM0 CACHE INTERNAL "") | ||
|
|
||
| elseif (TOOLCHAIN STREQUAL "iar") | ||
| message(FATAL_ERROR "IAR not supported") | ||
|
|
||
| endif () |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,17 @@ | ||
| if (TOOLCHAIN STREQUAL "gcc") | ||
| set(TOOLCHAIN_COMMON_FLAGS | ||
| -mcpu=cortex-a53 | ||
| ) | ||
| # set(FREERTOS_PORT GCC_ARM_CM0 CACHE INTERNAL "") | ||
|
|
||
| elseif (TOOLCHAIN STREQUAL "clang") | ||
| set(TOOLCHAIN_COMMON_FLAGS | ||
| --target=arm-none-eabi | ||
| -mcpu=cortex-a53 | ||
| ) | ||
| #set(FREERTOS_PORT GCC_ARM_CM0 CACHE INTERNAL "") | ||
|
|
||
| elseif (TOOLCHAIN STREQUAL "iar") | ||
| message(FATAL_ERROR "IAR not supported") | ||
|
|
||
| endif () |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,17 @@ | ||
| if (TOOLCHAIN STREQUAL "gcc") | ||
| set(TOOLCHAIN_COMMON_FLAGS | ||
| -mcpu=cortex-a72 | ||
| ) | ||
| # set(FREERTOS_PORT GCC_ARM_CM0 CACHE INTERNAL "") | ||
|
|
||
| elseif (TOOLCHAIN STREQUAL "clang") | ||
| set(TOOLCHAIN_COMMON_FLAGS | ||
| --target=arm-none-eabi | ||
| -mcpu=cortex-a72 | ||
| ) | ||
| #set(FREERTOS_PORT GCC_ARM_CM0 CACHE INTERNAL "") | ||
|
|
||
| elseif (TOOLCHAIN STREQUAL "iar") | ||
| message(FATAL_ERROR "IAR not supported") | ||
|
|
||
| endif () |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,22 @@ | ||
| if (TOOLCHAIN STREQUAL "gcc") | ||
| set(TOOLCHAIN_COMMON_FLAGS | ||
| -mthumb | ||
| -mcpu=cortex-m0plus | ||
| -mfloat-abi=soft | ||
| ) | ||
| set(FREERTOS_PORT GCC_ARM_CM0 CACHE INTERNAL "") | ||
|
|
||
| elseif (TOOLCHAIN STREQUAL "clang") | ||
| set(TOOLCHAIN_COMMON_FLAGS | ||
| --target=arm-none-eabi | ||
| -mcpu=cortex-m0 | ||
| ) | ||
| set(FREERTOS_PORT GCC_ARM_CM0 CACHE INTERNAL "") | ||
|
|
||
| elseif (TOOLCHAIN STREQUAL "iar") | ||
| set(TOOLCHAIN_COMMON_FLAGS | ||
| --cpu cortex-m0 | ||
| ) | ||
| set(FREERTOS_PORT IAR_ARM_CM0 CACHE INTERNAL "") | ||
|
|
||
| endif () |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,22 @@ | ||
| if (TOOLCHAIN STREQUAL "gcc") | ||
| set(TOOLCHAIN_COMMON_FLAGS | ||
| -mthumb | ||
| -mcpu=cortex-m0plus | ||
| -mfloat-abi=soft | ||
| ) | ||
| set(FREERTOS_PORT GCC_ARM_CM0 CACHE INTERNAL "") | ||
|
|
||
| elseif (TOOLCHAIN STREQUAL "clang") | ||
| set(TOOLCHAIN_COMMON_FLAGS | ||
| --target=arm-none-eabi | ||
| -mcpu=cortex-m0plus | ||
| ) | ||
| set(FREERTOS_PORT GCC_ARM_CM0 CACHE INTERNAL "") | ||
|
|
||
| elseif (TOOLCHAIN STREQUAL "iar") | ||
| set(TOOLCHAIN_COMMON_FLAGS | ||
| --cpu cortex-m0 | ||
| ) | ||
| set(FREERTOS_PORT IAR_ARM_CM0 CACHE INTERNAL "") | ||
|
|
||
| endif () |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,22 @@ | ||
| if (TOOLCHAIN STREQUAL "gcc") | ||
| set(TOOLCHAIN_COMMON_FLAGS | ||
| -mthumb | ||
| -mcpu=cortex-m23 | ||
| -mfloat-abi=soft | ||
| ) | ||
| set(FREERTOS_PORT GCC_ARM_CM23_NTZ_NONSECURE CACHE INTERNAL "") | ||
|
|
||
| elseif (TOOLCHAIN STREQUAL "clang") | ||
| set(TOOLCHAIN_COMMON_FLAGS | ||
| --target=arm-none-eabi | ||
| -mcpu=cortex-m23 | ||
| ) | ||
| set(FREERTOS_PORT GCC_ARM_CM23_NTZ_NONSECURE CACHE INTERNAL "") | ||
|
|
||
| elseif (TOOLCHAIN STREQUAL "iar") | ||
| set(TOOLCHAIN_COMMON_FLAGS | ||
| --cpu cortex-m23 | ||
| ) | ||
| set(FREERTOS_PORT IAR_ARM_CM23_NTZ_NONSECURE CACHE INTERNAL "") | ||
|
|
||
| endif () |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,21 @@ | ||
| if (TOOLCHAIN STREQUAL "gcc") | ||
| set(TOOLCHAIN_COMMON_FLAGS | ||
| -mthumb | ||
| -mcpu=cortex-m3 | ||
| ) | ||
| set(FREERTOS_PORT GCC_ARM_CM3 CACHE INTERNAL "") | ||
|
|
||
| elseif (TOOLCHAIN STREQUAL "clang") | ||
| set(TOOLCHAIN_COMMON_FLAGS | ||
| --target=arm-none-eabi | ||
| -mcpu=cortex-m3 | ||
| ) | ||
| set(FREERTOS_PORT GCC_ARM_CM3 CACHE INTERNAL "") | ||
|
|
||
| elseif (TOOLCHAIN STREQUAL "iar") | ||
| set(TOOLCHAIN_COMMON_FLAGS | ||
| --cpu cortex-m3 | ||
| ) | ||
| set(FREERTOS_PORT IAR_ARM_CM3 CACHE INTERNAL "") | ||
|
|
||
| endif () |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,18 @@ | ||
| if (TOOLCHAIN STREQUAL "gcc") | ||
| set(TOOLCHAIN_COMMON_FLAGS | ||
| -mthumb | ||
| -mcpu=cortex-m33+nodsp | ||
| -mfloat-abi=soft | ||
| ) | ||
| set(FREERTOS_PORT GCC_ARM_CM33_NTZ_NONSECURE CACHE INTERNAL "") | ||
|
|
||
| elseif (TOOLCHAIN STREQUAL "clang") | ||
| message(FATAL_ERROR "Clang is not supported for this target") | ||
|
|
||
| elseif (TOOLCHAIN STREQUAL "iar") | ||
| set(TOOLCHAIN_COMMON_FLAGS | ||
| --cpu cortex-m33+nodsp | ||
| ) | ||
| set(FREERTOS_PORT IAR_ARM_CM33_NTZ_NONSECURE CACHE INTERNAL "") | ||
|
|
||
| endif () |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,25 @@ | ||
| if (TOOLCHAIN STREQUAL "gcc") | ||
| set(TOOLCHAIN_COMMON_FLAGS | ||
| -mthumb | ||
| -mcpu=cortex-m33 | ||
| -mfloat-abi=hard | ||
| -mfpu=fpv5-sp-d16 | ||
| ) | ||
| set(FREERTOS_PORT GCC_ARM_CM33_NTZ_NONSECURE CACHE INTERNAL "") | ||
|
|
||
| elseif (TOOLCHAIN STREQUAL "clang") | ||
| set(TOOLCHAIN_COMMON_FLAGS | ||
| --target=arm-none-eabi | ||
| -mcpu=cortex-m33 | ||
| -mfpu=fpv5-sp-d16 | ||
| ) | ||
| set(FREERTOS_PORT GCC_ARM_CM33_NTZ_NONSECURE CACHE INTERNAL "") | ||
|
|
||
| elseif (TOOLCHAIN STREQUAL "iar") | ||
| set(TOOLCHAIN_COMMON_FLAGS | ||
| --cpu cortex-m33 | ||
| --fpu VFPv5-SP | ||
| ) | ||
| set(FREERTOS_PORT IAR_ARM_CM33_NTZ_NONSECURE CACHE INTERNAL "") | ||
|
|
||
| endif () |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -1,23 +1,32 @@ | ||
| if (TOOLCHAIN STREQUAL "gcc") | ||
| set(TOOLCHAIN_COMMON_FLAGS | ||
| -mthumb | ||
| -mcpu=cortex-m4 | ||
| -mfloat-abi=hard | ||
| -mfpu=fpv4-sp-d16 | ||
| ) | ||
|
|
||
| if (NOT DEFINED FREERTOS_PORT) | ||
| set(FREERTOS_PORT GCC_ARM_CM4F CACHE INTERNAL "") | ||
| endif () | ||
|
|
||
| elseif (TOOLCHAIN STREQUAL "iar") | ||
| set(TOOLCHAIN_COMMON_FLAGS | ||
| --cpu cortex-m4 | ||
| --fpu VFPv4 | ||
| ) | ||
|
|
||
| if (NOT DEFINED FREERTOS_PORT) | ||
| set(FREERTOS_PORT IAR_ARM_CM4F CACHE INTERNAL "") | ||
| endif () | ||
|
|
||
| endif () | ||
| if (TOOLCHAIN STREQUAL "gcc") | ||
| set(TOOLCHAIN_COMMON_FLAGS | ||
| -mthumb | ||
| -mcpu=cortex-m4 | ||
| -mfloat-abi=hard | ||
| -mfpu=fpv4-sp-d16 | ||
| ) | ||
| if (NOT DEFINED FREERTOS_PORT) | ||
| set(FREERTOS_PORT GCC_ARM_CM4F CACHE INTERNAL "") | ||
| endif () | ||
|
|
||
| elseif (TOOLCHAIN STREQUAL "clang") | ||
| set(TOOLCHAIN_COMMON_FLAGS | ||
| --target=arm-none-eabi | ||
| -mcpu=cortex-m4 | ||
| -mfpu=fpv4-sp-d16 | ||
| ) | ||
| if (NOT DEFINED FREERTOS_PORT) | ||
| set(FREERTOS_PORT GCC_ARM_CM4F CACHE INTERNAL "") | ||
| endif () | ||
|
|
||
| elseif (TOOLCHAIN STREQUAL "iar") | ||
| set(TOOLCHAIN_COMMON_FLAGS | ||
| --cpu cortex-m4 | ||
| --fpu VFPv4_sp | ||
| ) | ||
|
|
||
| if (NOT DEFINED FREERTOS_PORT) | ||
| set(FREERTOS_PORT IAR_ARM_CM4F CACHE INTERNAL "") | ||
| endif () | ||
|
|
||
| endif () |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,25 @@ | ||
| if (TOOLCHAIN STREQUAL "gcc") | ||
| set(TOOLCHAIN_COMMON_FLAGS | ||
| -mthumb | ||
| -mcpu=cortex-m7 | ||
| -mfloat-abi=hard | ||
| -mfpu=fpv5-sp-d16 | ||
| ) | ||
| set(FREERTOS_PORT GCC_ARM_CM7 CACHE INTERNAL "") | ||
|
|
||
| elseif (TOOLCHAIN STREQUAL "clang") | ||
| set(TOOLCHAIN_COMMON_FLAGS | ||
| --target=arm-none-eabi | ||
| -mcpu=cortex-m7 | ||
| -mfpu=fpv5-sp-d16 | ||
| ) | ||
| set(FREERTOS_PORT GCC_ARM_CM7 CACHE INTERNAL "") | ||
|
|
||
| elseif (TOOLCHAIN STREQUAL "iar") | ||
| set(TOOLCHAIN_COMMON_FLAGS | ||
| --cpu cortex-m7 | ||
| --fpu VFPv5_sp | ||
| ) | ||
| set(FREERTOS_PORT IAR_ARM_CM7 CACHE INTERNAL "") | ||
|
|
||
| endif () |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -1,19 +1,25 @@ | ||
| if (TOOLCHAIN STREQUAL "gcc") | ||
| set(TOOLCHAIN_COMMON_FLAGS | ||
| -mthumb | ||
| -mcpu=cortex-m7 | ||
| -mfloat-abi=hard | ||
| -mfpu=fpv5-d16 | ||
| ) | ||
|
|
||
| set(FREERTOS_PORT GCC_ARM_CM7 CACHE INTERNAL "") | ||
|
|
||
| elseif (TOOLCHAIN STREQUAL "iar") | ||
| set(TOOLCHAIN_COMMON_FLAGS | ||
| --cpu cortex-m7 | ||
| --fpu VFPv5_D16 | ||
| ) | ||
|
|
||
| set(FREERTOS_PORT IAR_ARM_CM7 CACHE INTERNAL "") | ||
|
|
||
| endif () | ||
| if (TOOLCHAIN STREQUAL "gcc") | ||
| set(TOOLCHAIN_COMMON_FLAGS | ||
| -mthumb | ||
| -mcpu=cortex-m7 | ||
| -mfloat-abi=hard | ||
| -mfpu=fpv5-d16 | ||
| ) | ||
| set(FREERTOS_PORT GCC_ARM_CM7 CACHE INTERNAL "") | ||
|
|
||
| elseif (TOOLCHAIN STREQUAL "clang") | ||
| set(TOOLCHAIN_COMMON_FLAGS | ||
| --target=arm-none-eabi | ||
| -mcpu=cortex-m7 | ||
| -mfpu=fpv5-d16 | ||
| ) | ||
| set(FREERTOS_PORT GCC_ARM_CM7 CACHE INTERNAL "") | ||
|
|
||
| elseif (TOOLCHAIN STREQUAL "iar") | ||
| set(TOOLCHAIN_COMMON_FLAGS | ||
| --cpu cortex-m7 | ||
| --fpu VFPv5_D16 | ||
| ) | ||
| set(FREERTOS_PORT IAR_ARM_CM7 CACHE INTERNAL "") | ||
|
|
||
| endif () |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,10 @@ | ||
| if (TOOLCHAIN STREQUAL "gcc") | ||
| set(FREERTOS_PORT GCC_MSP430F449 CACHE INTERNAL "") | ||
|
|
||
| elseif (TOOLCHAIN STREQUAL "clang") | ||
| message(FATAL_ERROR "Clang is not supported for this target") | ||
|
|
||
| elseif (TOOLCHAIN STREQUAL "iar") | ||
| set(FREERTOS_PORT IAR_MSP430 CACHE INTERNAL "") | ||
|
|
||
| endif () |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,19 @@ | ||
| if (TOOLCHAIN STREQUAL "gcc") | ||
| set(TOOLCHAIN_COMMON_FLAGS | ||
| -march=rv32i_zicsr | ||
| -mabi=ilp32 | ||
| ) | ||
| set(FREERTOS_PORT GCC_RISC_V CACHE INTERNAL "") | ||
|
|
||
| elseif (TOOLCHAIN STREQUAL "clang") | ||
| set(TOOLCHAIN_COMMON_FLAGS | ||
| -march=rv32i_zicsr | ||
| -mabi=ilp32 | ||
| ) | ||
| set(FREERTOS_PORT GCC_RISC_V CACHE INTERNAL "") | ||
|
|
||
| elseif (TOOLCHAIN STREQUAL "iar") | ||
| message(FATAL_ERROR "IAR not supported") | ||
| set(FREERTOS_PORT IAR_RISC_V CACHE INTERNAL "") | ||
|
|
||
| endif () |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,18 @@ | ||
| if (TOOLCHAIN STREQUAL "gcc") | ||
| set(TOOLCHAIN_COMMON_FLAGS | ||
| -march=rv32imac_zicsr | ||
| -mabi=ilp32 | ||
| ) | ||
| set(FREERTOS_PORT GCC_RISC_V CACHE INTERNAL "") | ||
|
|
||
| elseif (TOOLCHAIN STREQUAL "clang") | ||
| set(TOOLCHAIN_COMMON_FLAGS | ||
| -march=rv32imac_zicsr | ||
| -mabi=ilp32 | ||
| ) | ||
| set(FREERTOS_PORT GCC_RISC_V CACHE INTERNAL "") | ||
|
|
||
| elseif (TOOLCHAIN STREQUAL "iar") | ||
| message(FATAL_ERROR "IAR not supported") | ||
| set(FREERTOS_PORT IAR_RISC_V CACHE INTERNAL "") | ||
| endif () |
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