You signed in with another tab or window. Reload to refresh your session.You signed out in another tab or window. Reload to refresh your session.You switched accounts on another tab or window. Reload to refresh your session.Dismiss alert
{{ message }}
This repository has been archived by the owner on Mar 29, 2024. It is now read-only.
I was thinking about caches today. I currently implement them with 3 separate memories - one for valid bits, one for tag words, and one for data words. But it might be advantageous to merge these into a single memory (eg. If it helps implementation later in the pipeline). In this case, we would want to store all of this information in a single memory word, and ideally we’d like this “packing” and “unpacking” to be as safe and comfortable to use as possible. Note that this may put pressure on raising MAX_SIGNAL_BIT_WIDTH, which is ofc possible, but potentially a lot of effort.
I’m not entirely sure what this might look like.
The text was updated successfully, but these errors were encountered:
Sign up for freeto subscribe to this conversation on GitHub.
Already have an account?
Sign in.
I was thinking about caches today. I currently implement them with 3 separate memories - one for valid bits, one for tag words, and one for data words. But it might be advantageous to merge these into a single memory (eg. If it helps implementation later in the pipeline). In this case, we would want to store all of this information in a single memory word, and ideally we’d like this “packing” and “unpacking” to be as safe and comfortable to use as possible. Note that this may put pressure on raising
MAX_SIGNAL_BIT_WIDTH
, which is ofc possible, but potentially a lot of effort.I’m not entirely sure what this might look like.
The text was updated successfully, but these errors were encountered: