mux.vhd.bak

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;


entity mux is port (
   
   hex_in1, hex_in2	: in std_logic_vector(7 downto 0);
	mux_select :in std_logic;
	hex_out	:	out std_logic_vector(7 downto 0)

	
); 
end mux;

architecture Behavioral of mux is

--
begin
   
	with mux_select  select
	hex_out <= hex_in1 when "0";
					hex_in2 when "1";
				
	
	
end architecture Behavioral;