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Currently each UART instance requires a single xcore thread per Rx (Tx is handled inline, although could be offloaded to a thread). To support multiple Rxs in a single xcore thread (and possibly even a buffered Tx) we would need a manually developed select based UART (similar to XC's combinable feature). It may also be possible using this technique to turn the Tx into a buffered version sharing the Rx xcore thread which would allow it to behave like a typical UART HW peripheral.
The text was updated successfully, but these errors were encountered:
Currently each UART instance requires a single xcore thread per Rx (Tx is handled inline, although could be offloaded to a thread). To support multiple Rxs in a single xcore thread (and possibly even a buffered Tx) we would need a manually developed select based UART (similar to XC's combinable feature). It may also be possible using this technique to turn the Tx into a buffered version sharing the Rx xcore thread which would allow it to behave like a typical UART HW peripheral.
The text was updated successfully, but these errors were encountered: