-
Notifications
You must be signed in to change notification settings - Fork 252
/
itx_sse.asm
6533 lines (5809 loc) · 258 KB
/
itx_sse.asm
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
; Copyright © 2018-2021, VideoLAN and dav1d authors
; Copyright © 2018, Two Orioles, LLC
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
;
; 1. Redistributions of source code must retain the above copyright notice, this
; list of conditions and the following disclaimer.
;
; 2. Redistributions in binary form must reproduce the above copyright notice,
; this list of conditions and the following disclaimer in the documentation
; and/or other materials provided with the distribution.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
; ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
; WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
; ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
; (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
; ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
; SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
%include "config.asm"
%include "ext/x86/x86inc.asm"
SECTION_RODATA 16
deint_shuf: db 0, 1, 4, 5, 8, 9, 12, 13, 2, 3, 6, 7, 10, 11, 14, 15
deint_shuf1: db 0, 1, 8, 9, 2, 3, 10, 11, 4, 5, 12, 13, 6, 7, 14, 15
deint_shuf2: db 8, 9, 0, 1, 10, 11, 2, 3, 12, 13, 4, 5, 14, 15, 6, 7
%macro COEF_PAIR 2-3 0 ; !0 = m%1_m%2, 2 = no %2_%1
pw_%1_m%2: times 4 dw %1, -%2
%if %3 != 2
pw_%2_%1: times 4 dw %2, %1
%endif
%if %3
pw_m%1_m%2: times 4 dw -%1, -%2
%endif
%endmacro
;adst4
pw_1321_3803: times 4 dw 1321, 3803
pw_2482_m1321: times 4 dw 2482, -1321
pw_3344_2482: times 4 dw 3344, 2482
pw_3344_m3803: times 4 dw 3344, -3803
pw_3344_m3344: times 4 dw 3344, -3344
pw_0_3344 times 4 dw 0, 3344
pw_m6688_m3803: times 4 dw -6688, -3803
COEF_PAIR 2896, 2896
COEF_PAIR 1567, 3784
COEF_PAIR 799, 4017
COEF_PAIR 3406, 2276
COEF_PAIR 401, 4076
COEF_PAIR 1931, 3612
COEF_PAIR 3166, 2598
COEF_PAIR 3920, 1189
COEF_PAIR 3784, 1567, 1
COEF_PAIR 995, 3973
COEF_PAIR 1751, 3703
COEF_PAIR 3513, 2106
COEF_PAIR 3857, 1380
COEF_PAIR 4017, 799, 1
COEF_PAIR 201, 4091
COEF_PAIR 2440, 3290
COEF_PAIR 3035, 2751
COEF_PAIR 4052, 601
COEF_PAIR 2276, 3406, 1
COEF_PAIR 4076, 401, 2
COEF_PAIR 2598, 3166, 2
COEF_PAIR 3612, 1931, 2
COEF_PAIR 1189, 3920, 2
pd_2048: times 4 dd 2048
pw_2048: times 8 dw 2048
pw_m2048: times 8 dw -2048
pw_4096: times 8 dw 4096
pw_16384: times 8 dw 16384
pw_m16384: times 8 dw -16384
pw_1697x16: times 8 dw 1697*16
pw_1697x8: times 8 dw 1697*8
pw_2896x8: times 8 dw 2896*8
pw_3344x8: times 8 dw 3344*8
pw_8192: times 8 dw 8192
pw_m8192: times 8 dw -8192
pw_5: times 8 dw 5
pw_201x8: times 8 dw 201*8
pw_4091x8: times 8 dw 4091*8
pw_m2751x8: times 8 dw -2751*8
pw_3035x8: times 8 dw 3035*8
pw_1751x8: times 8 dw 1751*8
pw_3703x8: times 8 dw 3703*8
pw_m1380x8: times 8 dw -1380*8
pw_3857x8: times 8 dw 3857*8
pw_995x8: times 8 dw 995*8
pw_3973x8: times 8 dw 3973*8
pw_m2106x8: times 8 dw -2106*8
pw_3513x8: times 8 dw 3513*8
pw_2440x8: times 8 dw 2440*8
pw_3290x8: times 8 dw 3290*8
pw_m601x8: times 8 dw -601*8
pw_4052x8: times 8 dw 4052*8
pw_4095x8: times 8 dw 4095*8
pw_101x8: times 8 dw 101*8
pw_2967x8: times 8 dw 2967*8
pw_m2824x8: times 8 dw -2824*8
pw_3745x8: times 8 dw 3745*8
pw_1660x8: times 8 dw 1660*8
pw_3822x8: times 8 dw 3822*8
pw_m1474x8: times 8 dw -1474*8
pw_3996x8: times 8 dw 3996*8
pw_897x8: times 8 dw 897*8
pw_3461x8: times 8 dw 3461*8
pw_m2191x8: times 8 dw -2191*8
pw_3349x8: times 8 dw 3349*8
pw_2359x8: times 8 dw 2359*8
pw_4036x8: times 8 dw 4036*8
pw_m700x8: times 8 dw -700*8
pw_4065x8: times 8 dw 4065*8
pw_501x8: times 8 dw 501*8
pw_3229x8: times 8 dw 3229*8
pw_m2520x8: times 8 dw -2520*8
pw_3564x8: times 8 dw 3564*8
pw_2019x8: times 8 dw 2019*8
pw_3948x8: times 8 dw 3948*8
pw_m1092x8: times 8 dw -1092*8
pw_3889x8: times 8 dw 3889*8
pw_1285x8: times 8 dw 1285*8
pw_3659x8: times 8 dw 3659*8
pw_m1842x8: times 8 dw -1842*8
pw_3102x8: times 8 dw 3102*8
pw_2675x8: times 8 dw 2675*8
pw_4085x8: times 8 dw 4085*8
pw_m301x8: times 8 dw -301*8
SECTION .text
%define m(x) mangle(private_prefix %+ _ %+ x %+ SUFFIX)
%if ARCH_X86_64
%define o(x) x
%else
%define o(x) r5-$$+x ; PIC
%endif
%macro WRITE_4X4 9 ;src[1-2], tmp[1-3], row[1-4]
lea r2, [dstq+strideq*2]
%assign %%i 1
%rotate 5
%rep 4
%if %1 & 2
CAT_XDEFINE %%row_adr, %%i, r2 + strideq*(%1&1)
%else
CAT_XDEFINE %%row_adr, %%i, dstq + strideq*(%1&1)
%endif
%assign %%i %%i + 1
%rotate 1
%endrep
movd m%3, [%%row_adr1] ;dst0
movd m%5, [%%row_adr2] ;dst1
punpckldq m%3, m%5 ;high: dst1 :low: dst0
movd m%4, [%%row_adr3] ;dst2
movd m%5, [%%row_adr4] ;dst3
punpckldq m%4, m%5 ;high: dst3 :low: dst2
pxor m%5, m%5
punpcklbw m%3, m%5 ;extend byte to word
punpcklbw m%4, m%5 ;extend byte to word
paddw m%3, m%1 ;high: dst1 + out1 ;low: dst0 + out0
paddw m%4, m%2 ;high: dst3 + out3 ;low: dst2 + out2
packuswb m%3, m%4 ;high->low: dst3 + out3, dst2 + out2, dst1 + out1, dst0 + out0
movd [%%row_adr1], m%3 ;store dst0 + out0
pshuflw m%4, m%3, q1032
movd [%%row_adr2], m%4 ;store dst1 + out1
punpckhqdq m%3, m%3
movd [%%row_adr3], m%3 ;store dst2 + out2
psrlq m%3, 32
movd [%%row_adr4], m%3 ;store dst3 + out3
%endmacro
%macro ITX4_END 4-5 2048 ; row[1-4], rnd
%if %5
mova m2, [o(pw_%5)]
pmulhrsw m0, m2
pmulhrsw m1, m2
%endif
WRITE_4X4 0, 1, 2, 3, 4, %1, %2, %3, %4
ret
%endmacro
; flags: 1 = swap, 2: coef_regs, 4: no_pack
%macro ITX_MUL2X_PACK 5-6 0 ; dst/src, tmp[1], rnd, coef[1-2], flags
%if %6 & 2
pmaddwd m%2, m%4, m%1
pmaddwd m%1, m%5
%elif %6 & 1
pmaddwd m%2, m%1, [o(pw_%5_%4)]
pmaddwd m%1, [o(pw_%4_m%5)]
%else
pmaddwd m%2, m%1, [o(pw_%4_m%5)]
pmaddwd m%1, [o(pw_%5_%4)]
%endif
paddd m%2, m%3
paddd m%1, m%3
psrad m%2, 12
psrad m%1, 12
%if %6 & 4 == 0
packssdw m%1, m%2
%endif
%endmacro
%macro IDCT4_1D_PACKED 0-1 ;pw_2896x8
mova m3, [o(pd_2048)]
punpckhwd m2, m0, m1 ;unpacked in1 in3
punpcklwd m0, m1 ;unpacked in0 in2
ITX_MUL2X_PACK 2, 1, 3, 1567, 3784
ITX_MUL2X_PACK 0, 1, 3, 2896, 2896
psubsw m1, m0, m2 ;high: out2 ;low: out3
paddsw m0, m2 ;high: out1 ;low: out0
%endmacro
%macro INV_TXFM_FN 4+ ; type1, type2, size, xmm/stack
cglobal inv_txfm_add_%1_%2_%3_8bpc, 4, 6, %4, dst, stride, coeff, eob, tx2
%define %%p1 m(i%1_%3_internal_8bpc)
%if ARCH_X86_32
LEA r5, $$
%endif
%if has_epilogue
%ifidn %1_%2, dct_dct
test eobd, eobd
jz %%end
%endif
lea tx2q, [o(m(i%2_%3_internal_8bpc).pass2)]
call %%p1
RET
%%end:
%else
lea tx2q, [o(m(i%2_%3_internal_8bpc).pass2)]
%ifidn %1_%2, dct_dct
test eobd, eobd
jnz %%p1
%else
times ((%%end - %%p1) >> 31) & 1 jmp %%p1
ALIGN function_align
%%end:
%endif
%endif
%endmacro
%macro INV_TXFM_4X4_FN 2 ; type1, type2
INV_TXFM_FN %1, %2, 4x4, 6
%ifidn %1_%2, dct_dct
pshuflw m0, [coeffq], q0000
punpcklqdq m0, m0
mova m1, [o(pw_2896x8)]
pmulhrsw m0, m1
mov [coeffq], eobd ;0
pmulhrsw m0, m1
mova m1, m0
TAIL_CALL m(iadst_4x4_internal_8bpc).end2
%endif
%endmacro
INIT_XMM ssse3
; itx16 relies on dct_dct being the first function. If you change the order, adjust `itx8_start` in itx16.
INV_TXFM_4X4_FN dct, dct
INV_TXFM_4X4_FN dct, adst
INV_TXFM_4X4_FN dct, flipadst
INV_TXFM_4X4_FN dct, identity
cglobal idct_4x4_internal_8bpc, 0, 0, 0, dst, stride, coeff, eob, tx2
mova m0, [coeffq+16*0] ;high: in1 ;low: in0
mova m1, [coeffq+16*1] ;high: in3 ;low in2
IDCT4_1D_PACKED
mova m2, [o(deint_shuf)]
shufps m3, m0, m1, q1331
shufps m0, m1, q0220
pshufb m0, m2 ;high: in1 ;low: in0
pshufb m1, m3, m2 ;high: in3 ;low :in2
jmp tx2q
.pass2:
IDCT4_1D_PACKED
pxor m2, m2
mova [coeffq+16*0], m2
mova [coeffq+16*1], m2 ;memset(coeff, 0, sizeof(*coeff) * sh * sw);
ITX4_END 0, 1, 3, 2
INV_TXFM_4X4_FN adst, dct
INV_TXFM_4X4_FN adst, adst
INV_TXFM_4X4_FN adst, flipadst
INV_TXFM_4X4_FN adst, identity
cglobal iadst_4x4_internal_8bpc, 0, 0, 0, dst, stride, coeff, eob, tx2
mova m0, [coeffq+16*0]
mova m1, [coeffq+16*1]
call .main
punpckhwd m2, m0, m1
punpcklwd m0, m1
punpckhwd m1, m0, m2 ;high: in3 ;low :in2
punpcklwd m0, m2 ;high: in1 ;low: in0
jmp tx2q
.pass2:
call .main
.end:
pxor m2, m2
mova [coeffq+16*0], m2
mova [coeffq+16*1], m2
.end2:
ITX4_END 0, 1, 2, 3
ALIGN function_align
cglobal_label .main
punpcklwd m2, m0, m1 ;unpacked in0 in2
punpckhwd m0, m1 ;unpacked in1 in3
mova m3, m0
pmaddwd m1, m2, [o(pw_3344_m3344)];3344 * in0 - 3344 * in2
pmaddwd m0, [o(pw_0_3344)] ;3344 * in3
paddd m1, m0 ;t2
pmaddwd m0, m2, [o(pw_1321_3803)] ;1321 * in0 + 3803 * in2
pmaddwd m2, [o(pw_2482_m1321)] ;2482 * in0 - 1321 * in2
pmaddwd m4, m3, [o(pw_3344_2482)] ;3344 * in1 + 2482 * in3
pmaddwd m5, m3, [o(pw_3344_m3803)];3344 * in1 - 3803 * in3
paddd m4, m0 ;t0 + t3
pmaddwd m3, [o(pw_m6688_m3803)] ;-2 * 3344 * in1 - 3803 * in3
mova m0, [o(pd_2048)]
paddd m1, m0 ;t2 + 2048
paddd m2, m0
paddd m0, m4 ;t0 + t3 + 2048
paddd m5, m2 ;t1 + t3 + 2048
paddd m2, m4
paddd m2, m3 ;t0 + t1 - t3 + 2048
REPX {psrad x, 12}, m1, m0, m5, m2
packssdw m0, m5 ;high: out1 ;low: out0
packssdw m1, m2 ;high: out3 ;low: out3
ret
INV_TXFM_4X4_FN flipadst, dct
INV_TXFM_4X4_FN flipadst, adst
INV_TXFM_4X4_FN flipadst, flipadst
INV_TXFM_4X4_FN flipadst, identity
cglobal iflipadst_4x4_internal_8bpc, 0, 0, 0, dst, stride, coeff, eob, tx2
mova m0, [coeffq+16*0]
mova m1, [coeffq+16*1]
call m(iadst_4x4_internal_8bpc).main
punpcklwd m2, m1, m0
punpckhwd m1, m0
punpcklwd m0, m1, m2 ;high: in3 ;low :in2
punpckhwd m1, m2 ;high: in1 ;low: in0
jmp tx2q
.pass2:
call m(iadst_4x4_internal_8bpc).main
.end:
pxor m2, m2
mova [coeffq+16*0], m2
mova [coeffq+16*1], m2
.end2:
ITX4_END 3, 2, 1, 0
INV_TXFM_4X4_FN identity, dct
INV_TXFM_4X4_FN identity, adst
INV_TXFM_4X4_FN identity, flipadst
INV_TXFM_4X4_FN identity, identity
cglobal iidentity_4x4_internal_8bpc, 0, 0, 0, dst, stride, coeff, eob, tx2
mova m0, [coeffq+16*0]
mova m1, [coeffq+16*1]
mova m3, [o(pw_1697x8)]
pmulhrsw m2, m0, m3
pmulhrsw m3, m1
paddsw m0, m2
paddsw m1, m3
punpckhwd m2, m0, m1
punpcklwd m0, m1
punpckhwd m1, m0, m2 ;high: in3 ;low :in2
punpcklwd m0, m2 ;high: in1 ;low: in0
jmp tx2q
.pass2:
mova m3, [o(pw_1697x8)]
pmulhrsw m2, m3, m0
pmulhrsw m3, m1
paddsw m0, m2
paddsw m1, m3
jmp m(iadst_4x4_internal_8bpc).end
%macro IWHT4_1D_PACKED 0
punpckhqdq m3, m0, m1 ;low: in1 high: in3
punpcklqdq m0, m1 ;low: in0 high: in2
psubw m2, m0, m3 ;low: in0 - in1 high: in2 - in3
paddw m0, m3 ;low: in0 + in1 high: in2 + in3
punpckhqdq m2, m2 ;t2 t2
punpcklqdq m0, m0 ;t0 t0
psubw m1, m0, m2
psraw m1, 1 ;t4 t4
psubw m1, m3 ;low: t1/out2 high: t3/out1
psubw m0, m1 ;high: out0
paddw m2, m1 ;low: out3
%endmacro
INIT_XMM sse2
cglobal inv_txfm_add_wht_wht_4x4_8bpc, 3, 3, 4, dst, stride, coeff
mova m0, [coeffq+16*0]
mova m1, [coeffq+16*1]
pxor m2, m2
mova [coeffq+16*0], m2
mova [coeffq+16*1], m2
psraw m0, 2
psraw m1, 2
IWHT4_1D_PACKED
punpckhwd m0, m1
punpcklwd m3, m1, m2
punpckhdq m1, m0, m3
punpckldq m0, m3
IWHT4_1D_PACKED
shufpd m0, m2, 0x01
ITX4_END 0, 3, 2, 1, 0
%macro IDCT8_1D_PACKED 0
mova m6, [o(pd_2048)]
punpckhwd m4, m0, m3 ;unpacked in1 in7
punpcklwd m0, m2 ;unpacked in0 in4
punpckhwd m2, m1 ;unpacked in5 in3
punpcklwd m1, m3 ;unpacked in2 in6
ITX_MUL2X_PACK 4, 3, 6, 799, 4017 ;low: t7a high: t4a
ITX_MUL2X_PACK 2, 3, 6, 3406, 2276 ;low: t6a high: t5a
ITX_MUL2X_PACK 1, 3, 6, 1567, 3784 ;low: t3 high: t2
psubsw m3, m4, m2 ;low: t6a high: t5a
paddsw m4, m2 ;low: t7 high: t4
pshufb m3, [o(deint_shuf1)]
ITX_MUL2X_PACK 0, 2, 6, 2896, 2896 ;low: t0 high: t1
ITX_MUL2X_PACK 3, 2, 6, 2896, 2896 ;low: t6 high: t5
psubsw m2, m0, m1 ;low: tmp3 high: tmp2
paddsw m0, m1 ;low: tmp0 high: tmp1
punpcklqdq m1, m4, m3 ;low: t7 high: t6
punpckhqdq m4, m3 ;low: t4 high: t5
psubsw m3, m0, m1 ;low: out7 high: out6
paddsw m0, m1 ;low: out0 high: out1
paddsw m1, m2, m4 ;low: out3 high: out2
psubsw m2, m4 ;low: out4 high: out5
%endmacro
;dst1 = (src1 * coef1 - src2 * coef2 + rnd) >> 12
;dst2 = (src1 * coef2 + src2 * coef1 + rnd) >> 12
%macro ITX_MULSUB_2W 7-8 0 ; dst/src[1-2], tmp[1-2], rnd, coef[1-2], dst2_in_tmp1
punpckhwd m%4, m%1, m%2
punpcklwd m%1, m%2
%if %7 < 8
pmaddwd m%2, m%7, m%1
pmaddwd m%3, m%7, m%4
%else
mova m%2, [o(pw_%7_%6)]
%if %8
pmaddwd m%3, m%1, m%2
pmaddwd m%2, m%4
%else
pmaddwd m%3, m%4, m%2
pmaddwd m%2, m%1
%endif
%endif
paddd m%3, m%5
paddd m%2, m%5
psrad m%3, 12
psrad m%2, 12
%if %8
packssdw m%3, m%2
%else
packssdw m%2, m%3 ;dst2
%endif
%if %7 < 8
pmaddwd m%4, m%6
pmaddwd m%1, m%6
%elif %8
mova m%2, [o(pw_%6_m%7)]
pmaddwd m%4, m%2
pmaddwd m%1, m%2
%else
mova m%3, [o(pw_%6_m%7)]
pmaddwd m%4, m%3
pmaddwd m%1, m%3
%endif
paddd m%4, m%5
paddd m%1, m%5
psrad m%4, 12
psrad m%1, 12
packssdw m%1, m%4 ;dst1
%endmacro
%macro IDCT4_1D 7 ; src[1-4], tmp[1-2], pd_2048
ITX_MULSUB_2W %2, %4, %5, %6, %7, 1567, 3784, 1 ;t2, t3
ITX_MULSUB_2W %1, %3, %4, %6, %7, 2896, 2896, 1 ;t1, t0
psubsw m%3, m%1, m%2 ;out2
paddsw m%2, m%1 ;out1
paddsw m%1, m%5, m%4 ;out0
psubsw m%4, m%5 ;out3
%endmacro
%macro WRITE_4X8 4 ;row[1-4]
WRITE_4X4 0, 1, 4, 5, 6, %1, %2, %3, %4
lea dstq, [dstq+strideq*4]
WRITE_4X4 2, 3, 4, 5, 6, %1, %2, %3, %4
%endmacro
%macro INV_4X8 0
punpckhwd m4, m2, m3
punpcklwd m2, m3
punpckhwd m3, m0, m1
punpcklwd m0, m1
punpckhdq m1, m0, m2 ;low: in2 high: in3
punpckldq m0, m2 ;low: in0 high: in1
punpckldq m2, m3, m4 ;low: in4 high: in5
punpckhdq m3, m4 ;low: in6 high: in7
%endmacro
%macro INV_TXFM_4X8_FN 2 ; type1, type2
INV_TXFM_FN %1, %2, 4x8, 8
%ifidn %1_%2, dct_dct
pshuflw m0, [coeffq], q0000
punpcklqdq m0, m0
mova m1, [o(pw_2896x8)]
pmulhrsw m0, m1
mov [coeffq], eobd
pmulhrsw m0, m1
pmulhrsw m0, m1
pmulhrsw m0, [o(pw_2048)]
mova m1, m0
mova m2, m0
mova m3, m0
TAIL_CALL m(iadst_4x8_internal_8bpc).end3
%endif
%endmacro
INIT_XMM ssse3
INV_TXFM_4X8_FN dct, dct
INV_TXFM_4X8_FN dct, adst
INV_TXFM_4X8_FN dct, flipadst
INV_TXFM_4X8_FN dct, identity
cglobal idct_4x8_internal_8bpc, 0, 0, 0, dst, stride, coeff, eob, tx2
mova m3, [o(pw_2896x8)]
pmulhrsw m0, m3, [coeffq+16*0]
pmulhrsw m1, m3, [coeffq+16*1]
pmulhrsw m2, m3, [coeffq+16*2]
pmulhrsw m3, [coeffq+16*3]
.pass1:
call m(idct_8x4_internal_8bpc).main
jmp m(iadst_4x8_internal_8bpc).pass1_end
.pass2:
call .main
shufps m1, m1, q1032
shufps m3, m3, q1032
mova m4, [o(pw_2048)]
jmp m(iadst_4x8_internal_8bpc).end2
ALIGN function_align
cglobal_label .main
IDCT8_1D_PACKED
ret
INV_TXFM_4X8_FN adst, dct
INV_TXFM_4X8_FN adst, adst
INV_TXFM_4X8_FN adst, flipadst
INV_TXFM_4X8_FN adst, identity
cglobal iadst_4x8_internal_8bpc, 0, 0, 0, dst, stride, coeff, eob, tx2
mova m3, [o(pw_2896x8)]
pmulhrsw m0, m3, [coeffq+16*0]
pmulhrsw m1, m3, [coeffq+16*1]
pmulhrsw m2, m3, [coeffq+16*2]
pmulhrsw m3, [coeffq+16*3]
.pass1:
call m(iadst_8x4_internal_8bpc).main
.pass1_end:
INV_4X8
jmp tx2q
.pass2:
shufps m0, m0, q1032
shufps m1, m1, q1032
call .main
mova m4, [o(pw_2048)]
pxor m5, m5
psubw m5, m4
.end:
punpcklqdq m4, m5
.end2:
pmulhrsw m0, m4
pmulhrsw m1, m4
pmulhrsw m2, m4
pmulhrsw m3, m4
pxor m5, m5
mova [coeffq+16*0], m5
mova [coeffq+16*1], m5
mova [coeffq+16*2], m5
mova [coeffq+16*3], m5
.end3:
WRITE_4X8 0, 1, 2, 3
RET
ALIGN function_align
cglobal_label .main
mova m6, [o(pd_2048)]
punpckhwd m4, m3, m0 ;unpacked in7 in0
punpckhwd m5, m2, m1 ;unpacked in5 in2
punpcklwd m1, m2 ;unpacked in3 in4
punpcklwd m0, m3 ;unpacked in1 in6
ITX_MUL2X_PACK 4, 2, 6, 401, 4076 ;low: t0a high: t1a
ITX_MUL2X_PACK 5, 2, 6, 1931, 3612 ;low: t2a high: t3a
ITX_MUL2X_PACK 1, 2, 6, 3166, 2598 ;low: t4a high: t5a
ITX_MUL2X_PACK 0, 2, 6, 3920, 1189 ;low: t6a high: t7a
psubsw m3, m4, m1 ;low: t4 high: t5
paddsw m4, m1 ;low: t0 high: t1
psubsw m2, m5, m0 ;low: t6 high: t7
paddsw m5, m0 ;low: t2 high: t3
shufps m1, m3, m2, q1032
punpckhwd m2, m1
punpcklwd m3, m1
ITX_MUL2X_PACK 3, 0, 6, 1567, 3784, 1 ;low: t5a high: t4a
ITX_MUL2X_PACK 2, 0, 6, 3784, 1567 ;low: t7a high: t6a
psubsw m1, m4, m5 ;low: t2 high: t3
paddsw m4, m5 ;low: out0 high: -out7
psubsw m5, m3, m2 ;low: t7 high: t6
paddsw m3, m2 ;low: out6 high: -out1
shufps m0, m4, m3, q3210 ;low: out0 high: -out1
shufps m3, m4, q3210 ;low: out6 high: -out7
mova m2, [o(pw_2896_m2896)]
mova m7, [o(pw_2896_2896)]
shufps m4, m1, m5, q1032 ;low: t3 high: t7
shufps m1, m5, q3210 ;low: t2 high: t6
punpcklwd m5, m1, m4
punpckhwd m1, m4
pmaddwd m4, m2, m1 ;-out5
pmaddwd m2, m5 ; out4
pmaddwd m1, m7 ; out2
pmaddwd m5, m7 ;-out3
REPX {paddd x, m6}, m4, m2, m1, m5
REPX {psrad x, 12}, m4, m2, m1, m5
packssdw m1, m5 ;low: out2 high: -out3
packssdw m2, m4 ;low: out4 high: -out5
ret
INV_TXFM_4X8_FN flipadst, dct
INV_TXFM_4X8_FN flipadst, adst
INV_TXFM_4X8_FN flipadst, flipadst
INV_TXFM_4X8_FN flipadst, identity
cglobal iflipadst_4x8_internal_8bpc, 0, 0, 0, dst, stride, coeff, eob, tx2
mova m3, [o(pw_2896x8)]
pmulhrsw m0, m3, [coeffq+16*0]
pmulhrsw m1, m3, [coeffq+16*1]
pmulhrsw m2, m3, [coeffq+16*2]
pmulhrsw m3, [coeffq+16*3]
.pass1:
call m(iadst_8x4_internal_8bpc).main
punpcklwd m4, m3, m2
punpckhwd m3, m2
punpcklwd m5, m1, m0
punpckhwd m1, m0
punpckldq m2, m3, m1 ;low: in4 high: in5
punpckhdq m3, m1 ;low: in6 high: in7
punpckldq m0, m4, m5 ;low: in0 high: in1
punpckhdq m1, m4, m5 ;low: in2 high: in3
jmp tx2q
.pass2:
shufps m0, m0, q1032
shufps m1, m1, q1032
call m(iadst_4x8_internal_8bpc).main
mova m4, m0
mova m5, m1
pshufd m0, m3, q1032
pshufd m1, m2, q1032
pshufd m2, m5, q1032
pshufd m3, m4, q1032
mova m5, [o(pw_2048)]
pxor m4, m4
psubw m4, m5
jmp m(iadst_4x8_internal_8bpc).end
INV_TXFM_4X8_FN identity, dct
INV_TXFM_4X8_FN identity, adst
INV_TXFM_4X8_FN identity, flipadst
INV_TXFM_4X8_FN identity, identity
cglobal iidentity_4x8_internal_8bpc, 0, 0, 0, dst, stride, coeff, eob, tx2
mova m3, [o(pw_2896x8)]
pmulhrsw m0, m3, [coeffq+16*0]
pmulhrsw m1, m3, [coeffq+16*1]
pmulhrsw m2, m3, [coeffq+16*2]
pmulhrsw m3, [coeffq+16*3]
.pass1:
mova m7, [o(pw_1697x8)]
pmulhrsw m4, m7, m0
pmulhrsw m5, m7, m1
pmulhrsw m6, m7, m2
pmulhrsw m7, m3
paddsw m0, m4
paddsw m1, m5
paddsw m2, m6
paddsw m3, m7
jmp m(iadst_4x8_internal_8bpc).pass1_end
.pass2:
mova m4, [o(pw_4096)]
jmp m(iadst_4x8_internal_8bpc).end2
%macro WRITE_8X2 5 ;coefs[1-2], tmp[1-3]
movq m%3, [dstq ]
movq m%4, [dstq+strideq]
pxor m%5, m%5
punpcklbw m%3, m%5 ;extend byte to word
punpcklbw m%4, m%5 ;extend byte to word
%ifnum %1
paddw m%3, m%1
%else
paddw m%3, %1
%endif
%ifnum %2
paddw m%4, m%2
%else
paddw m%4, %2
%endif
packuswb m%3, m%4
movq [dstq ], m%3
punpckhqdq m%3, m%3
movq [dstq+strideq], m%3
%endmacro
%macro WRITE_8X4 7 ;coefs[1-4], tmp[1-3]
WRITE_8X2 %1, %2, %5, %6, %7
lea dstq, [dstq+strideq*2]
WRITE_8X2 %3, %4, %5, %6, %7
%endmacro
%macro INV_TXFM_8X4_FN 2 ; type1, type2
INV_TXFM_FN %1, %2, 8x4, 8
%ifidn %1_%2, dct_dct
pshuflw m0, [coeffq], q0000
punpcklqdq m0, m0
mova m1, [o(pw_2896x8)]
pmulhrsw m0, m1
pmulhrsw m0, m1
mova m2, [o(pw_2048)]
pmulhrsw m0, m1
pmulhrsw m0, m2
mova m1, m0
mova m2, m0
mova m3, m0
TAIL_CALL m(iadst_8x4_internal_8bpc).end2
%endif
%endmacro
INV_TXFM_8X4_FN dct, dct
INV_TXFM_8X4_FN dct, adst
INV_TXFM_8X4_FN dct, flipadst
INV_TXFM_8X4_FN dct, identity
cglobal idct_8x4_internal_8bpc, 0, 0, 0, dst, stride, coeff, eob, tx2
mova m3, [o(pw_2896x8)]
pmulhrsw m0, m3, [coeffq+16*0]
pmulhrsw m1, m3, [coeffq+16*1]
pmulhrsw m2, m3, [coeffq+16*2]
pmulhrsw m3, [coeffq+16*3]
call m(idct_4x8_internal_8bpc).main
mova m4, [o(deint_shuf1)]
mova m5, [o(deint_shuf2)]
pshufb m0, m4
pshufb m1, m5
pshufb m2, m4
pshufb m3, m5
punpckhdq m4, m0, m1
punpckldq m0, m1
punpckhdq m5, m2, m3
punpckldq m2, m3
punpckhqdq m1, m0, m2 ;in1
punpcklqdq m0, m2 ;in0
punpckhqdq m3, m4, m5 ;in3
punpcklqdq m2 ,m4, m5 ;in2
jmp tx2q
.pass2:
call .main
jmp m(iadst_8x4_internal_8bpc).end
ALIGN function_align
cglobal_label .main
mova m6, [o(pd_2048)]
IDCT4_1D 0, 1, 2, 3, 4, 5, 6
ret
INV_TXFM_8X4_FN adst, dct
INV_TXFM_8X4_FN adst, adst
INV_TXFM_8X4_FN adst, flipadst
INV_TXFM_8X4_FN adst, identity
cglobal iadst_8x4_internal_8bpc, 0, 0, 0, dst, stride, coeff, eob, tx2
mova m3, [o(pw_2896x8)]
pmulhrsw m0, m3, [coeffq+16*0]
pmulhrsw m1, m3, [coeffq+16*1]
pmulhrsw m2, m3, [coeffq+16*2]
pmulhrsw m3, [coeffq+16*3]
shufps m0, m0, q1032
shufps m1, m1, q1032
call m(iadst_4x8_internal_8bpc).main
punpckhwd m4, m0, m1
punpcklwd m0, m1
punpckhwd m1, m2, m3
punpcklwd m2, m3
pxor m5, m5
psubsw m3, m5, m1
psubsw m5, m4
punpckhdq m4, m5, m3
punpckldq m5, m3
punpckhdq m3, m0, m2
punpckldq m0, m2
punpckhwd m1, m0, m5 ;in1
punpcklwd m0, m5 ;in0
punpcklwd m2, m3, m4 ;in2
punpckhwd m3, m4 ;in3
jmp tx2q
.pass2:
call .main
.end:
mova m4, [o(pw_2048)]
pmulhrsw m0, m4
pmulhrsw m1, m4
pmulhrsw m2, m4
pmulhrsw m3, m4
.end2:
pxor m6, m6
mova [coeffq+16*0], m6
mova [coeffq+16*1], m6
mova [coeffq+16*2], m6
mova [coeffq+16*3], m6
.end3:
WRITE_8X4 0, 1, 2, 3, 4, 5, 6
RET
ALIGN function_align
cglobal_label .main
punpckhwd m6, m0, m2 ;unpacked in0 in2
punpcklwd m0, m2 ;unpacked in0 in2
punpckhwd m7, m1, m3 ;unpacked in1 in3
punpcklwd m1, m3 ;unpacked in1 in3
mova m2, [o(pw_3344_m3344)]
mova m4, [o(pw_0_3344)]
pmaddwd m3, m2, m6 ;3344 * in0 - 3344 * in2
pmaddwd m5, m4, m7 ;3344 * in3
pmaddwd m2, m0
pmaddwd m4, m1
paddd m3, m5
paddd m2, m4
mova m4, [o(pd_2048)]
paddd m3, m4 ;t2 + 2048
paddd m2, m4
psrad m3, 12
psrad m2, 12
packssdw m2, m3 ;out2
pmaddwd m4, m0, [o(pw_1321_3803)] ;1321 * in0 + 3803 * in2
pmaddwd m0, [o(pw_2482_m1321)] ;2482 * in0 - 1321 * in2
pmaddwd m3, m1, [o(pw_3344_2482)] ;3344 * in1 + 2482 * in3
pmaddwd m5, m1, [o(pw_3344_m3803)] ;3344 * in1 - 3803 * in3
paddd m3, m4 ;t0 + t3
pmaddwd m1, [o(pw_m6688_m3803)] ;-2 * 3344 * in1 - 3803 * in3
mova m4, [o(pd_2048)]
paddd m0, m4
paddd m4, m3 ;t0 + t3 + 2048
paddd m5, m0 ;t1 + t3 + 2048
paddd m3, m0
paddd m3, m1 ;t0 + t1 - t3 + 2048
psrad m4, 12 ;out0
psrad m5, 12 ;out1
psrad m3, 12 ;out3
packssdw m0, m4, m5 ;low: out0 high: out1
pmaddwd m4, m6, [o(pw_1321_3803)] ;1321 * in0 + 3803 * in2
pmaddwd m6, [o(pw_2482_m1321)] ;2482 * in0 - 1321 * in2
pmaddwd m1, m7, [o(pw_3344_2482)] ;3344 * in1 + 2482 * in3
pmaddwd m5, m7, [o(pw_3344_m3803)] ;3344 * in1 - 3803 * in3
paddd m1, m4 ;t0 + t3
pmaddwd m7, [o(pw_m6688_m3803)] ;-2 * 3344 * in1 - 3803 * in3
mova m4, [o(pd_2048)]
paddd m6, m4
paddd m4, m1 ;t0 + t3 + 2048
paddd m5, m6 ;t1 + t3 + 2048
paddd m1, m6
paddd m1, m7 ;t0 + t1 - t3 + 2048
psrad m4, 12 ;out0
psrad m5, 12 ;out1
psrad m1, 12 ;out3
packssdw m3, m1 ;out3
packssdw m4, m5 ;low: out0 high: out1
punpckhqdq m1, m0, m4 ;out1
punpcklqdq m0, m4 ;out0
ret
INV_TXFM_8X4_FN flipadst, dct
INV_TXFM_8X4_FN flipadst, adst
INV_TXFM_8X4_FN flipadst, flipadst
INV_TXFM_8X4_FN flipadst, identity
cglobal iflipadst_8x4_internal_8bpc, 0, 0, 0, dst, stride, coeff, eob, tx2
mova m3, [o(pw_2896x8)]
pmulhrsw m0, m3, [coeffq+16*0]
pmulhrsw m1, m3, [coeffq+16*1]
pmulhrsw m2, m3, [coeffq+16*2]
pmulhrsw m3, [coeffq+16*3]
shufps m0, m0, q1032
shufps m1, m1, q1032
call m(iadst_4x8_internal_8bpc).main
punpckhwd m5, m3, m2
punpcklwd m3, m2
punpckhwd m2, m1, m0
punpcklwd m1, m0
pxor m0, m0
psubsw m4, m0, m2
psubsw m0, m5
punpckhdq m2, m0, m4
punpckldq m0, m4
punpckhdq m4, m3, m1
punpckldq m3, m1
punpckhwd m1, m0, m3 ;in1
punpcklwd m0, m3 ;in0
punpckhwd m3, m2, m4 ;in3
punpcklwd m2, m4 ;in2
jmp tx2q
.pass2:
call m(iadst_8x4_internal_8bpc).main
mova m4, m0
mova m5, m1
mova m0, m3
mova m1, m2
mova m2, m5
mova m3, m4
jmp m(iadst_8x4_internal_8bpc).end
INV_TXFM_8X4_FN identity, dct
INV_TXFM_8X4_FN identity, adst
INV_TXFM_8X4_FN identity, flipadst
INV_TXFM_8X4_FN identity, identity