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VLSI-lab_list-of-experiments_schematic-design-of-transistor-level-xor-&-xnor-gate_references #143

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gayatripurigilla opened this issue Jun 12, 2018 · 4 comments

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@gayatripurigilla
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Defect description:when we click on the link http://jas.eng.buffalo.edu/education/fab/nmos/nmos.html under references in this experiment an error is displayedsteps to reproduce the issue:* click on iiit hyderabad under the participating institutes in vlabs main page.* click on hyper link VLSI lab* click on schematic design of transistor level xor & xnor gate.* click on references****expected result:page with relevant data isexpectedactual result:an error page is seenscreenshots:5859

@kurasaiteja
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My commit id is: 47448c7

@adityagoda24
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Valid fix

@divija123
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valid fix @kurasaiteja

@K7S3
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K7S3 commented Jun 29, 2018

Fix is validated and can be moved to production, kurasaiteja, S5.

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