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openssl__chacha20_poly1305_cf.patch
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openssl__chacha20_poly1305_cf.patch
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From 68bc18b82f7437373f9c301dce8fa811490e9567 Mon Sep 17 00:00:00 2001
From: Vlad Krasnov <[email protected]>
Date: Thu, 17 Sep 2015 17:36:53 -0700
Subject: [PATCH] CHACHA20-POLY1305 Draft 1
Rebase of the original patch on top of OpenSSL 1.0.2 stable as of September 19,
2015
---
Configure | 50 +-
Makefile.org | 4 +-
apps/speed.c | 34 +-
crypto/chacha20poly1305/Makefile | 92 +++
crypto/chacha20poly1305/asm/chacha20_avx.pl | 388 +++++++++++
crypto/chacha20poly1305/asm/chacha20_avx2.pl | 424 +++++++++++++
crypto/chacha20poly1305/asm/poly1305_avx.pl | 717 +++++++++++++++++++++
crypto/chacha20poly1305/asm/poly1305_avx2.pl | 918 +++++++++++++++++++++++++++
crypto/chacha20poly1305/chacha20.c | 157 +++++
crypto/chacha20poly1305/chacha20poly1305.h | 63 ++
crypto/chacha20poly1305/chapolytest.c | 287 +++++++++
crypto/chacha20poly1305/poly1305.c | 285 +++++++++
crypto/cryptlib.c | 14 +-
crypto/crypto.h | 2 +-
crypto/evp/Makefile | 7 +-
crypto/evp/e_chacha20poly1305.c | 323 ++++++++++
crypto/evp/evp.h | 3 +
crypto/objects/obj_dat.h | 10 +-
crypto/objects/obj_mac.h | 4 +
ssl/s3_lib.c | 62 +-
ssl/ssl.h | 1 +
ssl/ssl_algs.c | 4 +
ssl/ssl_ciph.c | 15 +-
ssl/ssl_locl.h | 1 +
ssl/tls1.h | 10 +
test/Makefile | 17 +-
26 files changed, 3845 insertions(+), 47 deletions(-)
create mode 100644 crypto/chacha20poly1305/Makefile
create mode 100644 crypto/chacha20poly1305/asm/chacha20_avx.pl
create mode 100644 crypto/chacha20poly1305/asm/chacha20_avx2.pl
create mode 100644 crypto/chacha20poly1305/asm/poly1305_avx.pl
create mode 100644 crypto/chacha20poly1305/asm/poly1305_avx2.pl
create mode 100644 crypto/chacha20poly1305/chacha20.c
create mode 100644 crypto/chacha20poly1305/chacha20poly1305.h
create mode 100644 crypto/chacha20poly1305/chapolytest.c
create mode 100644 crypto/chacha20poly1305/poly1305.c
create mode 100644 crypto/evp/e_chacha20poly1305.c
diff --git a/Configure b/Configure
index d99eed7..1a7f5f3 100755
--- a/Configure
+++ b/Configure
@@ -143,25 +143,25 @@ my $tlib="-lnsl -lsocket";
my $bits1="THIRTY_TWO_BIT ";
my $bits2="SIXTY_FOUR_BIT ";
-my $x86_asm="x86cpuid.o:bn-586.o co-586.o x86-mont.o x86-gf2m.o::des-586.o crypt586.o:aes-586.o vpaes-x86.o aesni-x86.o:bf-586.o:md5-586.o:sha1-586.o sha256-586.o sha512-586.o:cast-586.o:rc4-586.o:rmd-586.o:rc5-586.o:wp_block.o wp-mmx.o:cmll-x86.o:ghash-x86.o:";
+my $x86_asm="x86cpuid.o:bn-586.o co-586.o x86-mont.o x86-gf2m.o::des-586.o crypt586.o:aes-586.o vpaes-x86.o aesni-x86.o:bf-586.o:md5-586.o:sha1-586.o sha256-586.o sha512-586.o:cast-586.o:rc4-586.o:rmd-586.o:rc5-586.o:wp_block.o wp-mmx.o:cmll-x86.o:ghash-x86.o::";
my $x86_elf_asm="$x86_asm:elf";
-my $x86_64_asm="x86_64cpuid.o:x86_64-gcc.o x86_64-mont.o x86_64-mont5.o x86_64-gf2m.o rsaz_exp.o rsaz-x86_64.o rsaz-avx2.o:ecp_nistz256.o ecp_nistz256-x86_64.o::aes-x86_64.o vpaes-x86_64.o bsaes-x86_64.o aesni-x86_64.o aesni-sha1-x86_64.o aesni-sha256-x86_64.o aesni-mb-x86_64.o::md5-x86_64.o:sha1-x86_64.o sha256-x86_64.o sha512-x86_64.o sha1-mb-x86_64.o sha256-mb-x86_64.o::rc4-x86_64.o rc4-md5-x86_64.o:::wp-x86_64.o:cmll-x86_64.o cmll_misc.o:ghash-x86_64.o aesni-gcm-x86_64.o:";
-my $ia64_asm="ia64cpuid.o:bn-ia64.o ia64-mont.o:::aes_core.o aes_cbc.o aes-ia64.o::md5-ia64.o:sha1-ia64.o sha256-ia64.o sha512-ia64.o::rc4-ia64.o rc4_skey.o:::::ghash-ia64.o::void";
-my $sparcv9_asm="sparcv9cap.o sparccpuid.o:bn-sparcv9.o sparcv9-mont.o sparcv9a-mont.o vis3-mont.o sparct4-mont.o sparcv9-gf2m.o::des_enc-sparc.o fcrypt_b.o dest4-sparcv9.o:aes_core.o aes_cbc.o aes-sparcv9.o aest4-sparcv9.o::md5-sparcv9.o:sha1-sparcv9.o sha256-sparcv9.o sha512-sparcv9.o::::::camellia.o cmll_misc.o cmll_cbc.o cmllt4-sparcv9.o:ghash-sparcv9.o::void";
-my $sparcv8_asm=":sparcv8.o::des_enc-sparc.o fcrypt_b.o:::::::::::::void";
-my $alpha_asm="alphacpuid.o:bn_asm.o alpha-mont.o::::::sha1-alpha.o:::::::ghash-alpha.o::void";
-my $mips64_asm=":bn-mips.o mips-mont.o:::aes_cbc.o aes-mips.o:::sha1-mips.o sha256-mips.o sha512-mips.o::::::::";
+my $x86_64_asm="x86_64cpuid.o:x86_64-gcc.o x86_64-mont.o x86_64-mont5.o x86_64-gf2m.o rsaz_exp.o rsaz-x86_64.o rsaz-avx2.o:ecp_nistz256.o ecp_nistz256-x86_64.o::aes-x86_64.o vpaes-x86_64.o bsaes-x86_64.o aesni-x86_64.o aesni-sha1-x86_64.o aesni-sha256-x86_64.o aesni-mb-x86_64.o::md5-x86_64.o:sha1-x86_64.o sha256-x86_64.o sha512-x86_64.o sha1-mb-x86_64.o sha256-mb-x86_64.o::rc4-x86_64.o rc4-md5-x86_64.o:::wp-x86_64.o:cmll-x86_64.o cmll_misc.o:ghash-x86_64.o aesni-gcm-x86_64.o::chacha20_avx.o poly1305_avx.o chacha20_avx2.o poly1305_avx2.o";
+my $ia64_asm="ia64cpuid.o:bn-ia64.o ia64-mont.o:::aes_core.o aes_cbc.o aes-ia64.o::md5-ia64.o:sha1-ia64.o sha256-ia64.o sha512-ia64.o::rc4-ia64.o rc4_skey.o:::::ghash-ia64.o:::void";
+my $sparcv9_asm="sparcv9cap.o sparccpuid.o:bn-sparcv9.o sparcv9-mont.o sparcv9a-mont.o vis3-mont.o sparct4-mont.o sparcv9-gf2m.o::des_enc-sparc.o fcrypt_b.o dest4-sparcv9.o:aes_core.o aes_cbc.o aes-sparcv9.o aest4-sparcv9.o::md5-sparcv9.o:sha1-sparcv9.o sha256-sparcv9.o sha512-sparcv9.o::::::camellia.o cmll_misc.o cmll_cbc.o cmllt4-sparcv9.o:ghash-sparcv9.o:::void";
+my $sparcv8_asm=":sparcv8.o::des_enc-sparc.o fcrypt_b.o::::::::::::::void";
+my $alpha_asm="alphacpuid.o:bn_asm.o alpha-mont.o::::::sha1-alpha.o:::::::ghash-alpha.o:::void";
+my $mips64_asm=":bn-mips.o mips-mont.o:::aes_cbc.o aes-mips.o:::sha1-mips.o sha256-mips.o sha512-mips.o:::::::::";
my $mips32_asm=$mips64_asm; $mips32_asm =~ s/\s*sha512\-mips\.o//;
-my $s390x_asm="s390xcap.o s390xcpuid.o:bn-s390x.o s390x-mont.o s390x-gf2m.o:::aes-s390x.o aes-ctr.o aes-xts.o:::sha1-s390x.o sha256-s390x.o sha512-s390x.o::rc4-s390x.o:::::ghash-s390x.o:";
-my $armv4_asm="armcap.o armv4cpuid.o:bn_asm.o armv4-mont.o armv4-gf2m.o:::aes_cbc.o aes-armv4.o bsaes-armv7.o aesv8-armx.o:::sha1-armv4-large.o sha256-armv4.o sha512-armv4.o:::::::ghash-armv4.o ghashv8-armx.o::void";
-my $aarch64_asm="armcap.o arm64cpuid.o mem_clr.o::::aes_core.o aes_cbc.o aesv8-armx.o:::sha1-armv8.o sha256-armv8.o sha512-armv8.o:::::::ghashv8-armx.o:";
-my $parisc11_asm="pariscid.o:bn_asm.o parisc-mont.o:::aes_core.o aes_cbc.o aes-parisc.o:::sha1-parisc.o sha256-parisc.o sha512-parisc.o::rc4-parisc.o:::::ghash-parisc.o::32";
-my $parisc20_asm="pariscid.o:pa-risc2W.o parisc-mont.o:::aes_core.o aes_cbc.o aes-parisc.o:::sha1-parisc.o sha256-parisc.o sha512-parisc.o::rc4-parisc.o:::::ghash-parisc.o::64";
-my $ppc64_asm="ppccpuid.o ppccap.o:bn-ppc.o ppc-mont.o ppc64-mont.o:::aes_core.o aes_cbc.o aes-ppc.o vpaes-ppc.o aesp8-ppc.o:::sha1-ppc.o sha256-ppc.o sha512-ppc.o sha256p8-ppc.o sha512p8-ppc.o:::::::ghashp8-ppc.o:";
+my $s390x_asm="s390xcap.o s390xcpuid.o:bn-s390x.o s390x-mont.o s390x-gf2m.o:::aes-s390x.o aes-ctr.o aes-xts.o:::sha1-s390x.o sha256-s390x.o sha512-s390x.o::rc4-s390x.o:::::ghash-s390x.o::";
+my $armv4_asm="armcap.o armv4cpuid.o:bn_asm.o armv4-mont.o armv4-gf2m.o:::aes_cbc.o aes-armv4.o bsaes-armv7.o aesv8-armx.o:::sha1-armv4-large.o sha256-armv4.o sha512-armv4.o:::::::ghash-armv4.o ghashv8-armx.o:::void";
+my $aarch64_asm="armcap.o arm64cpuid.o mem_clr.o::::aes_core.o aes_cbc.o aesv8-armx.o:::sha1-armv8.o sha256-armv8.o sha512-armv8.o:::::::ghashv8-armx.o::";
+my $parisc11_asm="pariscid.o:bn_asm.o parisc-mont.o:::aes_core.o aes_cbc.o aes-parisc.o:::sha1-parisc.o sha256-parisc.o sha512-parisc.o::rc4-parisc.o:::::ghash-parisc.o:::32";
+my $parisc20_asm="pariscid.o:pa-risc2W.o parisc-mont.o:::aes_core.o aes_cbc.o aes-parisc.o:::sha1-parisc.o sha256-parisc.o sha512-parisc.o::rc4-parisc.o:::::ghash-parisc.o:::64";
+my $ppc64_asm="ppccpuid.o ppccap.o:bn-ppc.o ppc-mont.o ppc64-mont.o:::aes_core.o aes_cbc.o aes-ppc.o vpaes-ppc.o aesp8-ppc.o:::sha1-ppc.o sha256-ppc.o sha512-ppc.o sha256p8-ppc.o sha512p8-ppc.o:::::::ghashp8-ppc.o::";
my $ppc32_asm=$ppc64_asm;
-my $no_asm="::::::::::::::::void";
+my $no_asm=":::::::::::::::::void";
# As for $BSDthreads. Idea is to maintain "collective" set of flags,
# which would cover all BSD flavors. -pthread applies to them all,
@@ -706,6 +706,7 @@ my $idx_wp_obj = $idx++;
my $idx_cmll_obj = $idx++;
my $idx_modes_obj = $idx++;
my $idx_engines_obj = $idx++;
+my $idx_chapoly_obj = $idx++;
my $idx_perlasm_scheme = $idx++;
my $idx_dso_scheme = $idx++;
my $idx_shared_target = $idx++;
@@ -748,6 +749,7 @@ my $bf ="crypto/bf/bf_locl.h";
my $bn_asm ="bn_asm.o";
my $des_enc="des_enc.o fcrypt_b.o";
my $aes_enc="aes_core.o aes_cbc.o";
+my $chapoly_enc="";
my $bf_enc ="bf_enc.o";
my $cast_enc="c_enc.o";
my $rc4_enc="rc4_enc.o rc4_skey.o";
@@ -1206,7 +1208,7 @@ $openssldir=$prefix . "/" . $openssldir if $openssldir !~ /(^\/|^[a-zA-Z]:[\\\/]
print "IsMK1MF=$IsMK1MF\n";
-my @fields = split(/\s*:\s*/,$table{$target} . ":" x 30 , -1);
+my @fields = split(/\s*:\s*/,$table{$target} . ":" x 31 , -1);
my $cc = $fields[$idx_cc];
# Allow environment CC to override compiler...
if($ENV{CC}) {
@@ -1235,6 +1237,7 @@ my $wp_obj = $fields[$idx_wp_obj];
my $cmll_obj = $fields[$idx_cmll_obj];
my $modes_obj = $fields[$idx_modes_obj];
my $engines_obj = $fields[$idx_engines_obj];
+my $chapoly_obj = $fields[$idx_chapoly_obj];
my $perlasm_scheme = $fields[$idx_perlasm_scheme];
my $dso_scheme = $fields[$idx_dso_scheme];
my $shared_target = $fields[$idx_shared_target];
@@ -1401,7 +1404,7 @@ if ($no_asm)
{
$cpuid_obj=$bn_obj=$ec_obj=
$des_obj=$aes_obj=$bf_obj=$cast_obj=$rc4_obj=$rc5_obj=$cmll_obj=
- $modes_obj=$sha1_obj=$md5_obj=$rmd160_obj=$wp_obj=$engines_obj="";
+ $modes_obj=$sha1_obj=$md5_obj=$rmd160_obj=$wp_obj=$engines_obj=$chapoly_obj="";
}
if (!$no_shared)
@@ -1554,6 +1557,14 @@ $bf_obj=$bf_enc unless ($bf_obj =~ /\.o$/);
$cast_obj=$cast_enc unless ($cast_obj =~ /\.o$/);
$rc4_obj=$rc4_enc unless ($rc4_obj =~ /\.o$/);
$rc5_obj=$rc5_enc unless ($rc5_obj =~ /\.o$/);
+if ($chapoly_obj =~ /\.o$/)
+ {
+ $cflags.=" -DCHAPOLY_x86_64_ASM";
+ }
+else
+ {
+ $chapoly_obj=$chapoly_enc;
+ }
if ($sha1_obj =~ /\.o$/)
{
# $sha1_obj=$sha1_enc;
@@ -1733,7 +1744,8 @@ while (<IN>)
s/^RMD160_ASM_OBJ=.*$/RMD160_ASM_OBJ= $rmd160_obj/;
s/^WP_ASM_OBJ=.*$/WP_ASM_OBJ= $wp_obj/;
s/^CMLL_ENC=.*$/CMLL_ENC= $cmll_obj/;
- s/^MODES_ASM_OBJ.=*$/MODES_ASM_OBJ= $modes_obj/;
+ s/^MODES_ASM_OBJ.=*$/MODES_ASM_OBJ= $modes_obj/;
+ s/^CHAPOLY_ENC=.*$/CHAPOLY_ENC= $chapoly_obj/;
s/^ENGINES_ASM_OBJ.=*$/ENGINES_ASM_OBJ= $engines_obj/;
s/^PERLASM_SCHEME=.*$/PERLASM_SCHEME= $perlasm_scheme/;
s/^PROCESSOR=.*/PROCESSOR= $processor/;
@@ -1796,6 +1808,7 @@ print "RMD160_OBJ_ASM=$rmd160_obj\n";
print "CMLL_ENC =$cmll_obj\n";
print "MODES_OBJ =$modes_obj\n";
print "ENGINES_OBJ =$engines_obj\n";
+print "CHAPOLY_ENC =$chapoly_obj\n";
print "PROCESSOR =$processor\n";
print "RANLIB =$ranlib\n";
print "ARFLAGS =$arflags\n";
@@ -2194,7 +2207,7 @@ sub print_table_entry
my ($cc, $cflags, $unistd, $thread_cflag, $sys_id, $lflags,
$bn_ops, $cpuid_obj, $bn_obj, $ec_obj, $des_obj, $aes_obj, $bf_obj,
$md5_obj, $sha1_obj, $cast_obj, $rc4_obj, $rmd160_obj,
- $rc5_obj, $wp_obj, $cmll_obj, $modes_obj, $engines_obj,
+ $rc5_obj, $wp_obj, $cmll_obj, $modes_obj, $engines_obj, $chapoly_obj,
$perlasm_scheme, $dso_scheme, $shared_target, $shared_cflag,
$shared_ldflag, $shared_extension, $ranlib, $arflags, $multilib)=
split(/\s*:\s*/,$table{$target} . ":" x 30 , -1);
@@ -2225,6 +2238,7 @@ sub print_table_entry
\$cmll_obj = $cmll_obj
\$modes_obj = $modes_obj
\$engines_obj = $engines_obj
+\$chapoly_obj = $chapoly_obj
\$perlasm_scheme = $perlasm_scheme
\$dso_scheme = $dso_scheme
\$shared_target= $shared_target
diff --git a/Makefile.org b/Makefile.org
index 48469c5..c2c5107 100644
--- a/Makefile.org
+++ b/Makefile.org
@@ -91,6 +91,7 @@ BN_ASM= bn_asm.o
EC_ASM=
DES_ENC= des_enc.o fcrypt_b.o
AES_ENC= aes_core.o aes_cbc.o
+CHAPOLY_ENC=
BF_ENC= bf_enc.o
CAST_ENC= c_enc.o
RC4_ENC= rc4_enc.o
@@ -148,7 +149,7 @@ SDIRS= \
bn ec rsa dsa ecdsa dh ecdh dso engine \
buffer bio stack lhash rand err \
evp asn1 pem x509 x509v3 conf txt_db pkcs7 pkcs12 comp ocsp ui krb5 \
- cms pqueue ts jpake srp store cmac
+ cms pqueue ts jpake srp store cmac chacha20poly1305
# keep in mind that the above list is adjusted by ./Configure
# according to no-xxx arguments...
@@ -233,6 +234,7 @@ BUILDENV= PLATFORM='$(PLATFORM)' PROCESSOR='$(PROCESSOR)' \
WP_ASM_OBJ='$(WP_ASM_OBJ)' \
MODES_ASM_OBJ='$(MODES_ASM_OBJ)' \
ENGINES_ASM_OBJ='$(ENGINES_ASM_OBJ)' \
+ CHAPOLY_ENC='$(CHAPOLY_ENC)' \
PERLASM_SCHEME='$(PERLASM_SCHEME)' \
FIPSLIBDIR='${FIPSLIBDIR}' \
FIPSDIR='${FIPSDIR}' \
diff --git a/apps/speed.c b/apps/speed.c
index 3697b71..ecf7817 100644
--- a/apps/speed.c
+++ b/apps/speed.c
@@ -226,7 +226,7 @@
# endif
# undef BUFSIZE
-# define BUFSIZE ((long)1024*8+1)
+# define BUFSIZE ((long)1024*8+16)
static volatile int run = 0;
static int mr = 0;
@@ -241,7 +241,7 @@ static void print_result(int alg, int run_no, int count, double time_used);
static int do_multi(int multi);
# endif
-# define ALGOR_NUM 30
+# define ALGOR_NUM 31
# define SIZE_NUM 5
# define RSA_NUM 4
# define DSA_NUM 3
@@ -256,7 +256,7 @@ static const char *names[ALGOR_NUM] = {
"aes-128 cbc", "aes-192 cbc", "aes-256 cbc",
"camellia-128 cbc", "camellia-192 cbc", "camellia-256 cbc",
"evp", "sha256", "sha512", "whirlpool",
- "aes-128 ige", "aes-192 ige", "aes-256 ige", "ghash"
+ "aes-128 ige", "aes-192 ige", "aes-256 ige", "ghash", "chacha20-poly1305"
};
static double results[ALGOR_NUM][SIZE_NUM];
@@ -516,6 +516,7 @@ int MAIN(int argc, char **argv)
# define D_IGE_192_AES 27
# define D_IGE_256_AES 28
# define D_GHASH 29
+# define D_CHAPOLY 30
double d = 0.0;
long c[ALGOR_NUM][SIZE_NUM];
# define R_DSA_512 0
@@ -972,6 +973,11 @@ int MAIN(int argc, char **argv)
doit[D_CBC_256_CML] = 1;
} else
# endif
+# ifndef OPENSSL_NO_CHACHA_POLY
+ if (strcmp(*argv,"chacha20-poly1305") == 0) {
+ doit[D_CHAPOLY] = 1;
+ } else
+# endif
# ifndef OPENSSL_NO_RSA
if (strcmp(*argv, "rsa") == 0) {
rsa_doit[R_RSA_512] = 1;
@@ -1139,7 +1145,9 @@ int MAIN(int argc, char **argv)
BIO_printf(bio_err, "rc4");
# endif
BIO_printf(bio_err, "\n");
-
+# ifndef OPENSSL_NO_CHACHA_POLY
+ BIO_printf(bio_err,"chacha20-poly1305\n");
+# endif
# ifndef OPENSSL_NO_RSA
BIO_printf(bio_err, "rsa512 rsa1024 rsa2048 rsa4096\n");
# endif
@@ -1370,6 +1378,7 @@ int MAIN(int argc, char **argv)
c[D_IGE_192_AES][0] = count;
c[D_IGE_256_AES][0] = count;
c[D_GHASH][0] = count;
+ c[D_CHAPOLY][0] = count;
for (i = 1; i < SIZE_NUM; i++) {
c[D_MD2][i] = c[D_MD2][0] * 4 * lengths[0] / lengths[i];
@@ -1862,6 +1871,23 @@ int MAIN(int argc, char **argv)
}
}
# endif
+# ifndef OPENSSL_NO_CHACHA_POLY
+ if (doit[D_CHAPOLY]) {
+ EVP_CIPHER_CTX ctx;
+ EVP_CIPHER_CTX_init(&ctx);
+ EVP_CipherInit_ex(&ctx,EVP_chacha20_poly1305(),NULL,key32,NULL,1);
+ for (j=0; j<SIZE_NUM; j++) {
+ print_message(names[D_CHAPOLY],c[D_CHAPOLY][j],lengths[j]);
+ Time_F(START);
+ for (count=0,run=1; COND(c[D_CHAPOLY][j]); count++) {
+ EVP_CIPHER_CTX_ctrl(&ctx,EVP_CTRL_AEAD_TLS1_AAD,13,buf);
+ EVP_Cipher(&ctx,buf,buf,(unsigned long)lengths[j]+16);
+ }
+ d=Time_F(STOP);
+ print_result(D_CHAPOLY,j,count,d);
+ }
+ }
+# endif
# ifndef OPENSSL_NO_IDEA
if (doit[D_CBC_IDEA]) {
for (j = 0; j < SIZE_NUM; j++) {
diff --git a/crypto/chacha20poly1305/Makefile b/crypto/chacha20poly1305/Makefile
new file mode 100644
index 0000000..f21dd2e
--- /dev/null
+++ b/crypto/chacha20poly1305/Makefile
@@ -0,0 +1,92 @@
+#
+# crypto/chacha20poly1305/Makefile
+#
+DIR= chacha20poly1305
+TOP= ../..
+CC= cc
+CPP= $(CC) -E
+INCLUDES=
+CFLAG=-g
+MAKEFILE= Makefile
+AR= ar r
+
+
+CHAPOLY_ENC=
+
+CFLAGS= $(INCLUDES) $(CFLAG)
+ASFLAGS= $(INCLUDES) $(ASFLAG)
+AFLAGS= $(ASFLAGS)
+
+GENERAL=Makefile
+TEST=chapolytest.c
+APPS=
+
+LIB=$(TOP)/libcrypto.a
+LIBSRC=chacha20.c poly1305.c
+LIBOBJ=chacha20.o poly1305.o $(CHAPOLY_ENC)
+
+SRC= $(LIBSRC)
+
+EXHEADER=chacha20poly1305.h
+HEADER= $(EXHEADER)
+
+ALL= $(GENERAL) $(SRC) $(HEADER)
+
+top:
+ (cd ../..; $(MAKE) DIRS=crypto SDIRS=$(DIR) sub_all)
+
+all: lib
+
+lib: $(LIBOBJ)
+ $(AR) $(LIB) $(LIBOBJ)
+ $(RANLIB) $(LIB) || echo Never mind.
+ @touch lib
+
+chacha20_avx.s:asm/chacha20_avx.pl
+ $(PERL) asm/chacha20_avx.pl $(PERLASM_SCHEME) > $@
+poly1305_avx.s:asm/poly1305_avx.pl
+ $(PERL) asm/poly1305_avx.pl $(PERLASM_SCHEME) > $@
+chacha20_avx2.s:asm/chacha20_avx2.pl
+ $(PERL) asm/chacha20_avx2.pl $(PERLASM_SCHEME) > $@
+poly1305_avx2.s:asm/poly1305_avx2.pl
+ $(PERL) asm/poly1305_avx2.pl $(PERLASM_SCHEME) > $@
+
+files:
+ $(PERL) $(TOP)/util/files.pl Makefile >> $(TOP)/MINFO
+
+links:
+ @$(PERL) $(TOP)/util/mklink.pl ../../include/openssl $(EXHEADER)
+ @$(PERL) $(TOP)/util/mklink.pl ../../test $(TEST)
+ @$(PERL) $(TOP)/util/mklink.pl ../../apps $(APPS)
+
+install:
+ @[ -n "$(INSTALLTOP)" ] # should be set by top Makefile...
+ @headerlist="$(EXHEADER)"; for i in $$headerlist ; \
+ do \
+ (cp $$i $(INSTALL_PREFIX)$(INSTALLTOP)/include/openssl/$$i; \
+ chmod 644 $(INSTALL_PREFIX)$(INSTALLTOP)/include/openssl/$$i ); \
+ done;
+
+tags:
+ ctags $(SRC)
+
+tests:
+
+lint:
+ lint -DLINT $(INCLUDES) $(SRC)>fluff
+
+depend:
+ @[ -n "$(MAKEDEPEND)" ] # should be set by upper Makefile...
+ $(MAKEDEPEND) -- $(CFLAG) $(INCLUDES) $(DEPFLAG) -- $(PROGS) $(LIBSRC)
+
+dclean:
+ $(PERL) -pe 'if (/^# DO NOT DELETE THIS LINE/) {print; exit(0);}' $(MAKEFILE) >Makefile.new
+ mv -f Makefile.new $(MAKEFILE)
+
+clean:
+ rm -f *.s *.o *.obj lib tags core .pure .nfs* *.old *.bak fluff
+
+# DO NOT DELETE THIS LINE -- make depend depends on it.
+
+chacha20.o: ../../include/openssl/chacha20poly1305.h chacha20.c
+poly1305.o: ../../include/openssl/chacha20poly1305.h poly1305.c
diff --git a/crypto/chacha20poly1305/asm/chacha20_avx.pl b/crypto/chacha20poly1305/asm/chacha20_avx.pl
new file mode 100644
index 0000000..7b5b763
--- /dev/null
+++ b/crypto/chacha20poly1305/asm/chacha20_avx.pl
@@ -0,0 +1,388 @@
+#!/usr/bin/env perl
+
+##############################################################################
+# #
+# Copyright 2014 Intel Corporation #
+# #
+# Licensed under the Apache License, Version 2.0 (the "License"); #
+# you may not use this file except in compliance with the License. #
+# You may obtain a copy of the License at #
+# #
+# http://www.apache.org/licenses/LICENSE-2.0 #
+# #
+# Unless required by applicable law or agreed to in writing, software #
+# distributed under the License is distributed on an "AS IS" BASIS, #
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
+# See the License for the specific language governing permissions and #
+# limitations under the License. #
+# #
+##############################################################################
+# #
+# Developers and authors: #
+# Shay Gueron (1, 2), and Vlad Krasnov (1) #
+# (1) Intel Corporation, Israel Development Center #
+# (2) University of Haifa #
+# #
+# Related work: #
+# M. Goll, S. Gueron, "Vectorization on ChaCha Stream Cipher", IEEE #
+# Proceedings of 11th International Conference on Information #
+# Technology: New Generations (ITNG 2014), 612-615 (2014). #
+# M. Goll, S. Gueron, "Vectorization on Poly1305 Message Authentication Code"#
+# to be published. #
+# A. Langley, chacha20poly1305 for the AEAD head #
+# https://git.openssl.org/gitweb/?p=openssl.git;a=commit;h=9a8646510b3d0a48e950748f7a2aaa12ed40d5e0 #
+##############################################################################
+
+
+
+$flavour = shift;
+$output = shift;
+if ($flavour =~ /\./) { $output = $flavour; undef $flavour; }
+
+$win64=0; $win64=1 if ($flavour =~ /[nm]asm|mingw64/ || $output =~ /\.asm$/);
+
+$0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
+( $xlate="${dir}x86_64-xlate.pl" and -f $xlate ) or
+( $xlate="${dir}../../perlasm/x86_64-xlate.pl" and -f $xlate) or
+die "can't locate x86_64-xlate.pl";
+
+open OUT,"| \"$^X\" $xlate $flavour $output";
+*STDOUT=*OUT;
+
+if (`$ENV{CC} -Wa,-v -c -o /dev/null -x assembler /dev/null 2>&1`
+ =~ /GNU assembler version ([2-9]\.[0-9]+)/) {
+ $avx = ($1>=2.19) + ($1>=2.22);
+}
+
+if ($win64 && ($flavour =~ /nasm/ || $ENV{ASM} =~ /nasm/) &&
+ `nasm -v 2>&1` =~ /NASM version ([2-9]\.[0-9]+)/) {
+ $avx = ($1>=2.09) + ($1>=2.10);
+}
+
+if ($win64 && ($flavour =~ /masm/ || $ENV{ASM} =~ /ml64/) &&
+ `ml64 2>&1` =~ /Version ([0-9]+)\./) {
+ $avx = ($1>=10) + ($1>=11);
+}
+
+if (`$ENV{CC} -v 2>&1` =~ /(^clang version|based on LLVM) ([3-9])\.([0-9]+)/) {
+ my $ver = $2 + $3/100.0; # 3.1->3.01, 3.10->3.10
+ $avx = ($ver>=3.0) + ($ver>=3.01);
+}
+
+if ($avx>=1) {{
+
+sub chacha_qr {
+my ($a,$b,$c,$d,$tmp)=@_;
+$code.=<<___;
+
+ vpaddd $b, $a, $a # a += b
+ vpxor $a, $d, $d # d ^= a
+ vpshufb .rol16(%rip), $d, $d # d <<<= 16
+
+ vpaddd $d, $c, $c # c += d
+ vpxor $c, $b, $b # b ^= c
+ vpslld \$12, $b, $tmp
+ vpsrld \$20, $b, $b
+ vpxor $tmp, $b, $b # b <<<= 12
+
+ vpaddd $b, $a, $a # a += b
+ vpxor $a, $d, $d # d ^= a
+ vpshufb .rol8(%rip), $d, $d # d <<<= 8
+
+ vpaddd $d, $c, $c # c += d
+ vpxor $c, $b, $b # b ^= c
+
+ vpslld \$7, $b, $tmp
+ vpsrld \$25, $b, $b
+ vpxor $tmp, $b, $b # b <<<= 7
+___
+}
+
+
+$code.=<<___;
+.text
+.align 16
+chacha20_consts:
+.byte 'e','x','p','a','n','d',' ','3','2','-','b','y','t','e',' ','k'
+.rol8:
+.byte 3,0,1,2, 7,4,5,6, 11,8,9,10, 15,12,13,14
+.rol16:
+.byte 2,3,0,1, 6,7,4,5, 10,11,8,9, 14,15,12,13
+.avxInc:
+.quad 1,0
+___
+
+{
+my ($state_4567, $state_89ab, $state_cdef, $tmp,
+ $v0, $v1, $v2, $v3, $v4, $v5, $v6, $v7,
+ $v8, $v9, $v10, $v11)=map("%xmm$_",(0..15));
+
+my ($out, $in, $in_len, $key_ptr, $nonce_ptr, $counter, $nr)
+ =("%rdi", "%rsi", "%rdx", "%rcx", "%r8", "%r9", "%rax");
+
+$code.=<<___;
+.globl chacha_20_core_avx
+.type chacha_20_core_avx ,\@function,2
+.align 64
+chacha_20_core_avx:
+ vzeroupper
+
+ # Init state
+ vmovdqu 16*0($key_ptr), $state_4567
+ vmovdqu 16*1($key_ptr), $state_89ab
+ vmovq $counter, $state_cdef
+ vpinsrq \$1, ($nonce_ptr), $state_cdef, $state_cdef
+2:
+ cmp \$3*64, $in_len
+ jb 2f
+
+ vmovdqa chacha20_consts(%rip), $v0
+ vmovdqa chacha20_consts(%rip), $v4
+ vmovdqa chacha20_consts(%rip), $v8
+
+ vmovdqa $state_4567, $v1
+ vmovdqa $state_4567, $v5
+ vmovdqa $state_4567, $v9
+
+ vmovdqa $state_89ab, $v2
+ vmovdqa $state_89ab, $v6
+ vmovdqa $state_89ab, $v10
+
+ vmovdqa $state_cdef, $v3
+ vpaddq .avxInc(%rip), $v3, $v7
+ vpaddq .avxInc(%rip), $v7, $v11
+
+ mov \$10, $nr
+
+ 1:
+___
+ &chacha_qr($v0,$v1,$v2,$v3,$tmp);
+ &chacha_qr($v4,$v5,$v6,$v7,$tmp);
+ &chacha_qr($v8,$v9,$v10,$v11,$tmp);
+$code.=<<___;
+ vpalignr \$4, $v1, $v1, $v1
+ vpalignr \$8, $v2, $v2, $v2
+ vpalignr \$12, $v3, $v3, $v3
+ vpalignr \$4, $v5, $v5, $v5
+ vpalignr \$8, $v6, $v6, $v6
+ vpalignr \$12, $v7, $v7, $v7
+ vpalignr \$4, $v9, $v9, $v9
+ vpalignr \$8, $v10, $v10, $v10
+ vpalignr \$12, $v11, $v11, $v11
+___
+ &chacha_qr($v0,$v1,$v2,$v3,$tmp);
+ &chacha_qr($v4,$v5,$v6,$v7,$tmp);
+ &chacha_qr($v8,$v9,$v10,$v11,$tmp);
+$code.=<<___;
+ vpalignr \$12, $v1, $v1, $v1
+ vpalignr \$8, $v2, $v2, $v2
+ vpalignr \$4, $v3, $v3, $v3
+ vpalignr \$12, $v5, $v5, $v5
+ vpalignr \$8, $v6, $v6, $v6
+ vpalignr \$4, $v7, $v7, $v7
+ vpalignr \$12, $v9, $v9, $v9
+ vpalignr \$8, $v10, $v10, $v10
+ vpalignr \$4, $v11, $v11, $v11
+
+ dec $nr
+
+ jnz 1b
+
+ vpaddd chacha20_consts(%rip), $v0, $v0
+ vpaddd chacha20_consts(%rip), $v4, $v4
+ vpaddd chacha20_consts(%rip), $v8, $v8
+
+ vpaddd $state_4567, $v1, $v1
+ vpaddd $state_4567, $v5, $v5
+ vpaddd $state_4567, $v9, $v9
+
+ vpaddd $state_89ab, $v2, $v2
+ vpaddd $state_89ab, $v6, $v6
+ vpaddd $state_89ab, $v10, $v10
+
+ vpaddd $state_cdef, $v3, $v3
+ vpaddq .avxInc(%rip), $state_cdef, $state_cdef
+ vpaddd $state_cdef, $v7, $v7
+ vpaddq .avxInc(%rip), $state_cdef, $state_cdef
+ vpaddd $state_cdef, $v11, $v11
+ vpaddq .avxInc(%rip), $state_cdef, $state_cdef
+
+ vpxor 16*0($in), $v0, $v0
+ vpxor 16*1($in), $v1, $v1
+ vpxor 16*2($in), $v2, $v2
+ vpxor 16*3($in), $v3, $v3
+
+ vmovdqu $v0, 16*0($out)
+ vmovdqu $v1, 16*1($out)
+ vmovdqu $v2, 16*2($out)
+ vmovdqu $v3, 16*3($out)
+
+ vpxor 16*4($in), $v4, $v4
+ vpxor 16*5($in), $v5, $v5
+ vpxor 16*6($in), $v6, $v6
+ vpxor 16*7($in), $v7, $v7
+
+ vmovdqu $v4, 16*4($out)
+ vmovdqu $v5, 16*5($out)
+ vmovdqu $v6, 16*6($out)
+ vmovdqu $v7, 16*7($out)
+
+ vpxor 16*8($in), $v8, $v8
+ vpxor 16*9($in), $v9, $v9
+ vpxor 16*10($in), $v10, $v10
+ vpxor 16*11($in), $v11, $v11
+
+ vmovdqu $v8, 16*8($out)
+ vmovdqu $v9, 16*9($out)
+ vmovdqu $v10, 16*10($out)
+ vmovdqu $v11, 16*11($out)
+
+ lea 16*12($in), $in
+ lea 16*12($out), $out
+ sub \$16*12, $in_len
+
+ jmp 2b
+
+2:
+ cmp \$2*64, $in_len
+ jb 2f
+
+ vmovdqa chacha20_consts(%rip), $v0
+ vmovdqa chacha20_consts(%rip), $v4
+ vmovdqa $state_4567, $v1
+ vmovdqa $state_4567, $v5
+ vmovdqa $state_89ab, $v2
+ vmovdqa $state_89ab, $v6
+ vmovdqa $state_89ab, $v10
+ vmovdqa $state_cdef, $v3
+ vpaddq .avxInc(%rip), $v3, $v7
+
+ mov \$10, $nr
+
+ 1:
+___
+ &chacha_qr($v0,$v1,$v2,$v3,$tmp);
+ &chacha_qr($v4,$v5,$v6,$v7,$tmp);
+$code.=<<___;
+ vpalignr \$4, $v1, $v1, $v1
+ vpalignr \$8, $v2, $v2, $v2
+ vpalignr \$12, $v3, $v3, $v3
+ vpalignr \$4, $v5, $v5, $v5
+ vpalignr \$8, $v6, $v6, $v6
+ vpalignr \$12, $v7, $v7, $v7
+___
+ &chacha_qr($v0,$v1,$v2,$v3,$tmp);
+ &chacha_qr($v4,$v5,$v6,$v7,$tmp);
+$code.=<<___;
+ vpalignr \$12, $v1, $v1, $v1
+ vpalignr \$8, $v2, $v2, $v2
+ vpalignr \$4, $v3, $v3, $v3
+ vpalignr \$12, $v5, $v5, $v5
+ vpalignr \$8, $v6, $v6, $v6
+ vpalignr \$4, $v7, $v7, $v7
+
+ dec $nr
+
+ jnz 1b
+
+ vpaddd chacha20_consts(%rip), $v0, $v0
+ vpaddd chacha20_consts(%rip), $v4, $v4
+
+ vpaddd $state_4567, $v1, $v1
+ vpaddd $state_4567, $v5, $v5
+
+ vpaddd $state_89ab, $v2, $v2
+ vpaddd $state_89ab, $v6, $v6
+
+ vpaddd $state_cdef, $v3, $v3
+ vpaddq .avxInc(%rip), $state_cdef, $state_cdef
+ vpaddd $state_cdef, $v7, $v7
+ vpaddq .avxInc(%rip), $state_cdef, $state_cdef
+
+ vpxor 16*0($in), $v0, $v0
+ vpxor 16*1($in), $v1, $v1
+ vpxor 16*2($in), $v2, $v2
+ vpxor 16*3($in), $v3, $v3
+
+ vmovdqu $v0, 16*0($out)
+ vmovdqu $v1, 16*1($out)
+ vmovdqu $v2, 16*2($out)
+ vmovdqu $v3, 16*3($out)
+
+ vpxor 16*4($in), $v4, $v4
+ vpxor 16*5($in), $v5, $v5
+ vpxor 16*6($in), $v6, $v6
+ vpxor 16*7($in), $v7, $v7
+
+ vmovdqu $v4, 16*4($out)
+ vmovdqu $v5, 16*5($out)
+ vmovdqu $v6, 16*6($out)
+ vmovdqu $v7, 16*7($out)
+
+ lea 16*8($in), $in
+ lea 16*8($out), $out
+ sub \$16*8, $in_len
+
+ jmp 2b
+2:
+ cmp \$64, $in_len
+ jb 2f
+
+ vmovdqa chacha20_consts(%rip), $v0
+ vmovdqa $state_4567, $v1
+ vmovdqa $state_89ab, $v2
+ vmovdqa $state_cdef, $v3
+
+ mov \$10, $nr
+
+ 1:
+___
+ &chacha_qr($v0,$v1,$v2,$v3,$tmp);
+$code.=<<___;
+ vpalignr \$4, $v1, $v1, $v1
+ vpalignr \$8, $v2, $v2, $v2
+ vpalignr \$12, $v3, $v3, $v3
+___
+ &chacha_qr($v0,$v1,$v2,$v3,$tmp);
+$code.=<<___;
+ vpalignr \$12, $v1, $v1, $v1
+ vpalignr \$8, $v2, $v2, $v2
+ vpalignr \$4, $v3, $v3, $v3
+
+ dec $nr
+ jnz 1b
+
+ vpaddd chacha20_consts(%rip), $v0, $v0
+ vpaddd $state_4567, $v1, $v1
+ vpaddd $state_89ab, $v2, $v2
+ vpaddd $state_cdef, $v3, $v3
+ vpaddq .avxInc(%rip), $state_cdef, $state_cdef
+
+ vpxor 16*0($in), $v0, $v0
+ vpxor 16*1($in), $v1, $v1
+ vpxor 16*2($in), $v2, $v2
+ vpxor 16*3($in), $v3, $v3
+
+ vmovdqu $v0, 16*0($out)
+ vmovdqu $v1, 16*1($out)
+ vmovdqu $v2, 16*2($out)
+ vmovdqu $v3, 16*3($out)
+
+ lea 16*4($in), $in
+ lea 16*4($out), $out
+ sub \$16*4, $in_len
+ jmp 2b
+2:
+ vzeroupper
+ ret
+.size chacha_20_core_avx,.-chacha_20_core_avx
+___
+}
+}}
+
+
+$code =~ s/\`([^\`]*)\`/eval($1)/gem;
+
+print $code;
+
+close STDOUT;
diff --git a/crypto/chacha20poly1305/asm/chacha20_avx2.pl b/crypto/chacha20poly1305/asm/chacha20_avx2.pl
new file mode 100644
index 0000000..31ae721
--- /dev/null
+++ b/crypto/chacha20poly1305/asm/chacha20_avx2.pl
@@ -0,0 +1,424 @@
+#!/usr/bin/env perl
+
+##############################################################################
+# #
+# Copyright 2014 Intel Corporation #
+# #
+# Licensed under the Apache License, Version 2.0 (the "License"); #
+# you may not use this file except in compliance with the License. #
+# You may obtain a copy of the License at #
+# #
+# http://www.apache.org/licenses/LICENSE-2.0 #
+# #
+# Unless required by applicable law or agreed to in writing, software #
+# distributed under the License is distributed on an "AS IS" BASIS, #
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
+# See the License for the specific language governing permissions and #
+# limitations under the License. #
+# #
+##############################################################################
+# #
+# Developers and authors: #
+# Shay Gueron (1, 2), and Vlad Krasnov (1) #
+# (1) Intel Corporation, Israel Development Center #
+# (2) University of Haifa #
+# #
+# Related work: #
+# M. Goll, S. Gueron, "Vectorization on ChaCha Stream Cipher", IEEE #
+# Proceedings of 11th International Conference on Information #
+# Technology: New Generations (ITNG 2014), 612-615 (2014). #
+# M. Goll, S. Gueron, "Vectorization on Poly1305 Message Authentication Code"#
+# to be published. #
+# A. Langley, chacha20poly1305 for the AEAD head #
+# https://git.openssl.org/gitweb/?p=openssl.git;a=commit;h=9a8646510b3d0a48e950748f7a2aaa12ed40d5e0 #
+##############################################################################
+
+$flavour = shift;
+$output = shift;
+if ($flavour =~ /\./) { $output = $flavour; undef $flavour; }
+
+$win64=0; $win64=1 if ($flavour =~ /[nm]asm|mingw64/ || $output =~ /\.asm$/);
+
+$0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
+( $xlate="${dir}x86_64-xlate.pl" and -f $xlate ) or
+( $xlate="${dir}../../perlasm/x86_64-xlate.pl" and -f $xlate) or
+die "can't locate x86_64-xlate.pl";
+
+open OUT,"| \"$^X\" $xlate $flavour $output";
+*STDOUT=*OUT;
+
+if (`$ENV{CC} -Wa,-v -c -o /dev/null -x assembler /dev/null 2>&1`
+ =~ /GNU assembler version ([2-9]\.[0-9]+)/) {
+ $avx = ($1>=2.19) + ($1>=2.22);
+}
+
+if ($win64 && ($flavour =~ /nasm/ || $ENV{ASM} =~ /nasm/) &&
+ `nasm -v 2>&1` =~ /NASM version ([2-9]\.[0-9]+)/) {
+ $avx = ($1>=2.09) + ($1>=2.10);
+}
+
+if ($win64 && ($flavour =~ /masm/ || $ENV{ASM} =~ /ml64/) &&
+ `ml64 2>&1` =~ /Version ([0-9]+)\./) {
+ $avx = ($1>=10) + ($1>=11);
+}
+
+if (`$ENV{CC} -v 2>&1` =~ /(^clang version|based on LLVM) ([3-9])\.([0-9]+)/) {
+ my $ver = $2 + $3/100.0; # 3.1->3.01, 3.10->3.10
+ $avx = ($ver>=3.0) + ($ver>=3.01);
+}
+
+if ($avx>=2) {{
+
+sub chacha_qr {
+my ($a,$b,$c,$d,$tmp)=@_;
+$code.=<<___;
+
+ vpaddd $b, $a, $a # a += b
+ vpxor $a, $d, $d # d ^= a
+ vpshufb .rol16(%rip), $d, $d # d <<<= 16
+
+ vpaddd $d, $c, $c # c += d
+ vpxor $c, $b, $b # b ^= c
+ vpslld \$12, $b, $tmp
+ vpsrld \$20, $b, $b
+ vpxor $tmp, $b, $b # b <<<= 12
+
+ vpaddd $b, $a, $a # a += b
+ vpxor $a, $d, $d # d ^= a
+ vpshufb .rol8(%rip), $d, $d # d <<<= 8
+
+ vpaddd $d, $c, $c # c += d
+ vpxor $c, $b, $b # b ^= c
+
+ vpslld \$7, $b, $tmp
+ vpsrld \$25, $b, $b
+ vpxor $tmp, $b, $b # b <<<= 7
+___
+}
+
+
+$code.=<<___;
+.text
+.align 32
+chacha20_consts:
+.byte 'e','x','p','a','n','d',' ','3','2','-','b','y','t','e',' ','k'
+.byte 'e','x','p','a','n','d',' ','3','2','-','b','y','t','e',' ','k'
+.rol8:
+.byte 3,0,1,2, 7,4,5,6, 11,8,9,10, 15,12,13,14
+.byte 3,0,1,2, 7,4,5,6, 11,8,9,10, 15,12,13,14
+.rol16:
+.byte 2,3,0,1, 6,7,4,5, 10,11,8,9, 14,15,12,13
+.byte 2,3,0,1, 6,7,4,5, 10,11,8,9, 14,15,12,13
+.avx2Init:
+.quad 0,0,1,0
+.avx2Inc:
+.quad 2,0,2,0
+___
+
+{
+my ($state_4567, $state_89ab, $state_cdef, $tmp,
+ $v0, $v1, $v2, $v3, $v4, $v5, $v6, $v7,
+ $v8, $v9, $v10, $v11)=map("%ymm$_",(0..15));
+
+my $state_cdef_xmm="%xmm2";
+
+my ($out, $in, $in_len, $key_ptr, $nonce_ptr, $counter, $nr)
+ =("%rdi", "%rsi", "%rdx", "%rcx", "%r8", "%r9", "%rax");
+
+$code.=<<___;
+.globl chacha_20_core_avx2
+.type chacha_20_core_avx2 ,\@function,2
+.align 64
+chacha_20_core_avx2:
+ vzeroupper
+
+ # Init state
+ vbroadcasti128 16*0($key_ptr), $state_4567
+ vbroadcasti128 16*1($key_ptr), $state_89ab
+ vmovq $counter, $state_cdef_xmm
+ vpinsrq \$1, ($nonce_ptr), $state_cdef_xmm, $state_cdef_xmm
+ vperm2i128 \$0x00, $state_cdef, $state_cdef, $state_cdef
+ vpaddq .avx2Init(%rip), $state_cdef, $state_cdef
+
+2:
+ cmp \$6*64, $in_len
+ jb 2f
+
+ vmovdqa chacha20_consts(%rip), $v0
+ vmovdqa chacha20_consts(%rip), $v4
+ vmovdqa chacha20_consts(%rip), $v8
+
+ vmovdqa $state_4567, $v1
+ vmovdqa $state_4567, $v5
+ vmovdqa $state_4567, $v9
+
+ vmovdqa $state_89ab, $v2
+ vmovdqa $state_89ab, $v6
+ vmovdqa $state_89ab, $v10
+
+ vmovdqa $state_cdef, $v3
+ vpaddq .avx2Inc(%rip), $v3, $v7
+ vpaddq .avx2Inc(%rip), $v7, $v11
+
+ mov \$10, $nr
+
+ 1:
+___
+ &chacha_qr($v0,$v1,$v2,$v3,$tmp);
+ &chacha_qr($v4,$v5,$v6,$v7,$tmp);
+ &chacha_qr($v8,$v9,$v10,$v11,$tmp);
+$code.=<<___;
+ vpalignr \$4, $v1, $v1, $v1
+ vpalignr \$8, $v2, $v2, $v2
+ vpalignr \$12, $v3, $v3, $v3
+ vpalignr \$4, $v5, $v5, $v5
+ vpalignr \$8, $v6, $v6, $v6
+ vpalignr \$12, $v7, $v7, $v7
+ vpalignr \$4, $v9, $v9, $v9
+ vpalignr \$8, $v10, $v10, $v10
+ vpalignr \$12, $v11, $v11, $v11
+___
+ &chacha_qr($v0,$v1,$v2,$v3,$tmp);
+ &chacha_qr($v4,$v5,$v6,$v7,$tmp);
+ &chacha_qr($v8,$v9,$v10,$v11,$tmp);
+$code.=<<___;
+ vpalignr \$12, $v1, $v1, $v1
+ vpalignr \$8, $v2, $v2, $v2
+ vpalignr \$4, $v3, $v3, $v3
+ vpalignr \$12, $v5, $v5, $v5
+ vpalignr \$8, $v6, $v6, $v6
+ vpalignr \$4, $v7, $v7, $v7
+ vpalignr \$12, $v9, $v9, $v9
+ vpalignr \$8, $v10, $v10, $v10
+ vpalignr \$4, $v11, $v11, $v11
+
+ dec $nr
+
+ jnz 1b