vivado.log

#-----------------------------------------------------------
# Vivado v2017.4 (64-bit)
# SW Build 2086221 on Fri Dec 15 20:55:39 MST 2017
# IP Build 2085800 on Fri Dec 15 22:25:07 MST 2017
# Start of session at: Fri Aug  3 22:29:00 2018
# Process ID: 13712
# Current directory: D:/A_Design/FPGA_design/Vivado/SATA_0601/axi_vip
# Command line: vivado.exe -gui_launcher_event rodinguilauncherevent4304 D:\A_Design\FPGA_design\Vivado\SATA_0601\axi_vip\axi_vip.xpr
# Log file: D:/A_Design/FPGA_design/Vivado/SATA_0601/axi_vip/vivado.log
# Journal file: D:/A_Design/FPGA_design/Vivado/SATA_0601/axi_vip\vivado.jou
#-----------------------------------------------------------
start_gui
open_project D:/A_Design/FPGA_design/Vivado/SATA_0601/axi_vip/axi_vip.xpr
Scanning sources...
Finished scanning sources
INFO: [IP_Flow 19-234] Refreshing IP repositories
INFO: [IP_Flow 19-1704] No user IP repositories specified
INFO: [IP_Flow 19-2313] Loaded Vivado IP repository 'D:/Xilinx/Vivado/2017.4/data/ip'.
open_project: Time (s): cpu = 00:00:32 ; elapsed = 00:00:32 . Memory (MB): peak = 764.461 ; gain = 117.207