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pffft-double.c
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pffft-double.c
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/* Copyright (c) 2013 Julien Pommier ( [email protected] )
Based on original fortran 77 code from FFTPACKv4 from NETLIB
(http://www.netlib.org/fftpack), authored by Dr Paul Swarztrauber
of NCAR, in 1985.
As confirmed by the NCAR fftpack software curators, the following
FFTPACKv5 license applies to FFTPACKv4 sources. My changes are
released under the same terms.
FFTPACK license:
http://www.cisl.ucar.edu/css/software/fftpack5/ftpk.html
Copyright (c) 2004 the University Corporation for Atmospheric
Research ("UCAR"). All rights reserved. Developed by NCAR's
Computational and Information Systems Laboratory, UCAR,
www.cisl.ucar.edu.
Redistribution and use of the Software in source and binary forms,
with or without modification, is permitted provided that the
following conditions are met:
- Neither the names of NCAR's Computational and Information Systems
Laboratory, the University Corporation for Atmospheric Research,
nor the names of its sponsors or contributors may be used to
endorse or promote products derived from this Software without
specific prior written permission.
- Redistributions of source code must retain the above copyright
notices, this list of conditions, and the disclaimer below.
- Redistributions in binary form must reproduce the above copyright
notice, this list of conditions, and the disclaimer below in the
documentation and/or other materials provided with the
distribution.
THIS SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING, BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
NONINFRINGEMENT. IN NO EVENT SHALL THE CONTRIBUTORS OR COPYRIGHT
HOLDERS BE LIABLE FOR ANY CLAIM, INDIRECT, INCIDENTAL, SPECIAL,
EXEMPLARY, OR CONSEQUENTIAL DAMAGES OR OTHER LIABILITY, WHETHER IN AN
ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH THE
SOFTWARE.
PFFFT : a Pretty Fast FFT.
This file is largerly based on the original FFTPACK implementation, modified in
order to take advantage of SIMD instructions of modern CPUs.
*/
/*
ChangeLog:
- 2011/10/02, version 1: This is the very first release of this file.
*/
/*
NOTE: This file is adapted from Julien Pommier's original PFFFT,
which works on 32 bit floating point precision using SSE instructions,
to work with 64 bit floating point precision using AVX instructions.
Author: Dario Mambro @ https://github.com/unevens/pffft
*/
/* detect compiler flavour */
#if defined(_MSC_VER)
# define COMPILER_MSVC
#elif defined(__GNUC__)
# define COMPILER_GCC
#endif
#ifdef COMPILER_MSVC
# define _USE_MATH_DEFINES
# include <malloc.h>
# pragma warning( disable : 4244 4305 4204 4456 )
#else
# include <alloca.h>
#endif
#include "pffft-double.h"
#include <stdlib.h>
#include <stdio.h>
#include <math.h>
#include <assert.h>
#if defined(COMPILER_GCC)
# define ALWAYS_INLINE(return_type) inline return_type __attribute__ ((always_inline))
# define NEVER_INLINE(return_type) return_type __attribute__ ((noinline))
# define RESTRICT __restrict
# define VLA_ARRAY_ON_STACK(type__, varname__, size__) type__ varname__[size__];
#elif defined(COMPILER_MSVC)
# define ALWAYS_INLINE(return_type) __forceinline return_type
# define NEVER_INLINE(return_type) __declspec(noinline) return_type
# define RESTRICT __restrict
# define VLA_ARRAY_ON_STACK(type__, varname__, size__) type__ *varname__ = (type__*)_alloca(size__ * sizeof(type__))
#endif
/*
vector support macros: the rest of the code is independant of
AVX -- adding support for other platforms with 4-element
vectors should be limited to these macros
*/
// define PFFFTD_SIMD_DISABLE if you want to use scalar code instead of simd code
//#define PFFFTD_SIMD_DISABLE
/*
AVX support macros
*/
#if !defined(PFFFTD_SIMD_DISABLE) && defined(__AVX__)
#include <immintrin.h>
typedef __m256d v4sd;
# define SIMD_SZ 4 // 4 doubles by simd vector
# define VZERO() _mm256_setzero_pd()
# define VMUL(a,b) _mm256_mul_pd(a,b)
# define VADD(a,b) _mm256_add_pd(a,b)
# define VMADD(a,b,c) _mm256_add_pd(_mm256_mul_pd(a,b), c)
# define VSUB(a,b) _mm256_sub_pd(a,b)
# define LD_PS1(p) _mm256_set1_pd(p)
/* INTERLEAVE2 (in1, in2, out1, out2) pseudo code:
out1 = [ in1[0], in2[0], in1[1], in2[1] ]
out2 = [ in1[2], in2[2], in1[3], in2[3] ]
*/
# define INTERLEAVE2(in1, in2, out1, out2) { \
__m128d low1__ = _mm256_castpd256_pd128(in1); \
__m128d low2__ = _mm256_castpd256_pd128(in2); \
__m128d high1__ = _mm256_extractf128_pd(in1, 1); \
__m128d high2__ = _mm256_extractf128_pd(in2, 1); \
__m256d tmp__ = _mm256_insertf128_pd( \
_mm256_castpd128_pd256(_mm_shuffle_pd(low1__, low2__, 0)), \
_mm_shuffle_pd(low1__, low2__, 3), \
1); \
out2 = _mm256_insertf128_pd( \
_mm256_castpd128_pd256(_mm_shuffle_pd(high1__, high2__, 0)), \
_mm_shuffle_pd(high1__, high2__, 3), \
1); \
out1 = tmp__; \
}
/*UNINTERLEAVE2(in1, in2, out1, out2) pseudo code:
out1 = [ in1[0], in1[2], in2[0], in2[2] ]
out2 = [ in1[1], in1[3], in2[1], in2[3] ]
*/
# define UNINTERLEAVE2(in1, in2, out1, out2) { \
__m128d low1__ = _mm256_castpd256_pd128(in1); \
__m128d low2__ = _mm256_castpd256_pd128(in2); \
__m128d high1__ = _mm256_extractf128_pd(in1, 1); \
__m128d high2__ = _mm256_extractf128_pd(in2, 1); \
__m256d tmp__ = _mm256_insertf128_pd( \
_mm256_castpd128_pd256(_mm_shuffle_pd(low1__, high1__, 0)), \
_mm_shuffle_pd(low2__, high2__, 0), \
1); \
out2 = _mm256_insertf128_pd( \
_mm256_castpd128_pd256(_mm_shuffle_pd(low1__, high1__, 3)), \
_mm_shuffle_pd(low2__, high2__, 3), \
1); \
out1 = tmp__; \
}
# define VTRANSPOSE4(row0, row1, row2, row3) { \
__m256d tmp3, tmp2, tmp1, tmp0; \
\
tmp0 = _mm256_shuffle_pd((row0),(row1), 0x0); \
tmp2 = _mm256_shuffle_pd((row0),(row1), 0xF); \
tmp1 = _mm256_shuffle_pd((row2),(row3), 0x0); \
tmp3 = _mm256_shuffle_pd((row2),(row3), 0xF); \
\
(row0) = _mm256_permute2f128_pd(tmp0, tmp1, 0x20); \
(row1) = _mm256_permute2f128_pd(tmp2, tmp3, 0x20); \
(row2) = _mm256_permute2f128_pd(tmp0, tmp1, 0x31); \
(row3) = _mm256_permute2f128_pd(tmp2, tmp3, 0x31); \
}
/*VSWAPHL(a, b) pseudo code:
return [ b[0], b[1], a[2], a[3] ]
*/
# define VSWAPHL(a,b) \
_mm256_insertf128_pd(_mm256_castpd128_pd256(_mm256_castpd256_pd128(b)), _mm256_extractf128_pd(a, 1), 1)
# define VALIGNED(ptr) ((((uintptr_t)(ptr)) & 0x1F) == 0)
#else
#define PFFFTD_SIMD_DISABLE
#endif
// fallback mode for situations where AVX is not available, use scalar mode instead
#ifdef PFFFTD_SIMD_DISABLE
typedef double v4sd;
# define SIMD_SZ 1
# define VZERO() 0.f
# define VMUL(a,b) ((a)*(b))
# define VADD(a,b) ((a)+(b))
# define VMADD(a,b,c) ((a)*(b)+(c))
# define VSUB(a,b) ((a)-(b))
# define LD_PS1(p) (p)
# define VALIGNED(ptr) ((((uintptr_t)(ptr)) & 0x3) == 0)
#endif
// shortcuts for complex multiplcations
#define VCPLXMUL(ar,ai,br,bi) { v4sd tmp; tmp=VMUL(ar,bi); ar=VMUL(ar,br); ar=VSUB(ar,VMUL(ai,bi)); ai=VMUL(ai,br); ai=VADD(ai,tmp); }
#define VCPLXMULCONJ(ar,ai,br,bi) { v4sd tmp; tmp=VMUL(ar,bi); ar=VMUL(ar,br); ar=VADD(ar,VMUL(ai,bi)); ai=VMUL(ai,br); ai=VSUB(ai,tmp); }
#ifndef SVMUL
// multiply a scalar with a vector
#define SVMUL(f,v) VMUL(LD_PS1(f),v)
#endif
#if !defined(PFFFTD_SIMD_DISABLE)
typedef union v4sd_union {
v4sd v;
double f[4];
} v4sd_union;
#include <string.h>
#define assertv4(v,f0,f1,f2,f3) assert(v.f[0] == (f0) && v.f[1] == (f1) && v.f[2] == (f2) && v.f[3] == (f3))
/* detect bugs with the vector support macros */
void validate_pffftd_simd() {
double f[16] = { 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 };
v4sd_union a0, a1, a2, a3, t, u;
memcpy(a0.f, f, 4*sizeof(double));
memcpy(a1.f, f+4, 4*sizeof(double));
memcpy(a2.f, f+8, 4*sizeof(double));
memcpy(a3.f, f+12, 4*sizeof(double));
t = a0; u = a1; t.v = VZERO();
printf("VZERO=[%2g %2g %2g %2g]\n", t.f[0], t.f[1], t.f[2], t.f[3]); assertv4(t, 0, 0, 0, 0);
t.v = VADD(a1.v, a2.v);
printf("VADD(4:7,8:11)=[%2g %2g %2g %2g]\n", t.f[0], t.f[1], t.f[2], t.f[3]); assertv4(t, 12, 14, 16, 18);
t.v = VMUL(a1.v, a2.v);
printf("VMUL(4:7,8:11)=[%2g %2g %2g %2g]\n", t.f[0], t.f[1], t.f[2], t.f[3]); assertv4(t, 32, 45, 60, 77);
t.v = VMADD(a1.v, a2.v,a0.v);
printf("VMADD(4:7,8:11,0:3)=[%2g %2g %2g %2g]\n", t.f[0], t.f[1], t.f[2], t.f[3]); assertv4(t, 32, 46, 62, 80);
INTERLEAVE2(a1.v,a2.v,t.v,u.v);
printf("INTERLEAVE2(4:7,8:11)=[%2g %2g %2g %2g] [%2g %2g %2g %2g]\n", t.f[0], t.f[1], t.f[2], t.f[3], u.f[0], u.f[1], u.f[2], u.f[3]);
assertv4(t, 4, 8, 5, 9); assertv4(u, 6, 10, 7, 11);
UNINTERLEAVE2(a1.v,a2.v,t.v,u.v);
printf("UNINTERLEAVE2(4:7,8:11)=[%2g %2g %2g %2g] [%2g %2g %2g %2g]\n", t.f[0], t.f[1], t.f[2], t.f[3], u.f[0], u.f[1], u.f[2], u.f[3]);
assertv4(t, 4, 6, 8, 10); assertv4(u, 5, 7, 9, 11);
t.v=LD_PS1(f[15]);
printf("LD_PS1(15)=[%2g %2g %2g %2g]\n", t.f[0], t.f[1], t.f[2], t.f[3]);
assertv4(t, 15, 15, 15, 15);
t.v = VSWAPHL(a1.v, a2.v);
printf("VSWAPHL(4:7,8:11)=[%2g %2g %2g %2g]\n", t.f[0], t.f[1], t.f[2], t.f[3]);
assertv4(t, 8, 9, 6, 7);
VTRANSPOSE4(a0.v, a1.v, a2.v, a3.v);
printf("VTRANSPOSE4(0:3,4:7,8:11,12:15)=[%2g %2g %2g %2g] [%2g %2g %2g %2g] [%2g %2g %2g %2g] [%2g %2g %2g %2g]\n",
a0.f[0], a0.f[1], a0.f[2], a0.f[3], a1.f[0], a1.f[1], a1.f[2], a1.f[3],
a2.f[0], a2.f[1], a2.f[2], a2.f[3], a3.f[0], a3.f[1], a3.f[2], a3.f[3]);
assertv4(a0, 0, 4, 8, 12); assertv4(a1, 1, 5, 9, 13); assertv4(a2, 2, 6, 10, 14); assertv4(a3, 3, 7, 11, 15);
}
#endif //!PFFFTD_SIMD_DISABLE
/* SSE and co like 16-bytes aligned pointers */
#define MALLOC_V4SF_ALIGNMENT 64 // with a 64-byte alignment, we are even aligned on L2 cache lines...
void *pffftd_aligned_malloc(size_t nb_bytes) {
void *p, *p0 = malloc(nb_bytes + MALLOC_V4SF_ALIGNMENT);
if (!p0) return (void *) 0;
p = (void *) (((size_t) p0 + MALLOC_V4SF_ALIGNMENT) & (~((size_t) (MALLOC_V4SF_ALIGNMENT-1))));
*((void **) p - 1) = p0;
return p;
}
void pffftd_aligned_free(void *p) {
if (p) free(*((void **) p - 1));
}
int pffftd_simd_size() { return SIMD_SZ; }
/*
passf2 and passb2 has been merged here, fsign = -1 for passf2, +1 for passb2
*/
static NEVER_INLINE(void) passf2_ps(int ido, int l1, const v4sd *cc, v4sd *ch, const double *wa1, double fsign) {
int k, i;
int l1ido = l1*ido;
if (ido <= 2) {
for (k=0; k < l1ido; k += ido, ch += ido, cc+= 2*ido) {
ch[0] = VADD(cc[0], cc[ido+0]);
ch[l1ido] = VSUB(cc[0], cc[ido+0]);
ch[1] = VADD(cc[1], cc[ido+1]);
ch[l1ido + 1] = VSUB(cc[1], cc[ido+1]);
}
} else {
for (k=0; k < l1ido; k += ido, ch += ido, cc += 2*ido) {
for (i=0; i<ido-1; i+=2) {
v4sd tr2 = VSUB(cc[i+0], cc[i+ido+0]);
v4sd ti2 = VSUB(cc[i+1], cc[i+ido+1]);
v4sd wr = LD_PS1(wa1[i]), wi = VMUL(LD_PS1(fsign), LD_PS1(wa1[i+1]));
ch[i] = VADD(cc[i+0], cc[i+ido+0]);
ch[i+1] = VADD(cc[i+1], cc[i+ido+1]);
VCPLXMUL(tr2, ti2, wr, wi);
ch[i+l1ido] = tr2;
ch[i+l1ido+1] = ti2;
}
}
}
}
/*
passf3 and passb3 has been merged here, fsign = -1 for passf3, +1 for passb3
*/
static NEVER_INLINE(void) passf3_ps(int ido, int l1, const v4sd *cc, v4sd *ch,
const double *wa1, const double *wa2, double fsign) {
static const double taur = -0.5f;
double taui = 0.866025403784439f*fsign;
int i, k;
v4sd tr2, ti2, cr2, ci2, cr3, ci3, dr2, di2, dr3, di3;
int l1ido = l1*ido;
double wr1, wi1, wr2, wi2;
assert(ido > 2);
for (k=0; k< l1ido; k += ido, cc+= 3*ido, ch +=ido) {
for (i=0; i<ido-1; i+=2) {
tr2 = VADD(cc[i+ido], cc[i+2*ido]);
cr2 = VADD(cc[i], SVMUL(taur,tr2));
ch[i] = VADD(cc[i], tr2);
ti2 = VADD(cc[i+ido+1], cc[i+2*ido+1]);
ci2 = VADD(cc[i +1], SVMUL(taur,ti2));
ch[i+1] = VADD(cc[i+1], ti2);
cr3 = SVMUL(taui, VSUB(cc[i+ido], cc[i+2*ido]));
ci3 = SVMUL(taui, VSUB(cc[i+ido+1], cc[i+2*ido+1]));
dr2 = VSUB(cr2, ci3);
dr3 = VADD(cr2, ci3);
di2 = VADD(ci2, cr3);
di3 = VSUB(ci2, cr3);
wr1=wa1[i], wi1=fsign*wa1[i+1], wr2=wa2[i], wi2=fsign*wa2[i+1];
VCPLXMUL(dr2, di2, LD_PS1(wr1), LD_PS1(wi1));
ch[i+l1ido] = dr2;
ch[i+l1ido + 1] = di2;
VCPLXMUL(dr3, di3, LD_PS1(wr2), LD_PS1(wi2));
ch[i+2*l1ido] = dr3;
ch[i+2*l1ido+1] = di3;
}
}
} /* passf3 */
static NEVER_INLINE(void) passf4_ps(int ido, int l1, const v4sd *cc, v4sd *ch,
const double *wa1, const double *wa2, const double *wa3, double fsign) {
/* isign == -1 for forward transform and +1 for backward transform */
int i, k;
v4sd ci2, ci3, ci4, cr2, cr3, cr4, ti1, ti2, ti3, ti4, tr1, tr2, tr3, tr4;
int l1ido = l1*ido;
if (ido == 2) {
for (k=0; k < l1ido; k += ido, ch += ido, cc += 4*ido) {
tr1 = VSUB(cc[0], cc[2*ido + 0]);
tr2 = VADD(cc[0], cc[2*ido + 0]);
ti1 = VSUB(cc[1], cc[2*ido + 1]);
ti2 = VADD(cc[1], cc[2*ido + 1]);
ti4 = VMUL(VSUB(cc[1*ido + 0], cc[3*ido + 0]), LD_PS1(fsign));
tr4 = VMUL(VSUB(cc[3*ido + 1], cc[1*ido + 1]), LD_PS1(fsign));
tr3 = VADD(cc[ido + 0], cc[3*ido + 0]);
ti3 = VADD(cc[ido + 1], cc[3*ido + 1]);
ch[0*l1ido + 0] = VADD(tr2, tr3);
ch[0*l1ido + 1] = VADD(ti2, ti3);
ch[1*l1ido + 0] = VADD(tr1, tr4);
ch[1*l1ido + 1] = VADD(ti1, ti4);
ch[2*l1ido + 0] = VSUB(tr2, tr3);
ch[2*l1ido + 1] = VSUB(ti2, ti3);
ch[3*l1ido + 0] = VSUB(tr1, tr4);
ch[3*l1ido + 1] = VSUB(ti1, ti4);
}
} else {
for (k=0; k < l1ido; k += ido, ch+=ido, cc += 4*ido) {
for (i=0; i<ido-1; i+=2) {
double wr1, wi1, wr2, wi2, wr3, wi3;
tr1 = VSUB(cc[i + 0], cc[i + 2*ido + 0]);
tr2 = VADD(cc[i + 0], cc[i + 2*ido + 0]);
ti1 = VSUB(cc[i + 1], cc[i + 2*ido + 1]);
ti2 = VADD(cc[i + 1], cc[i + 2*ido + 1]);
tr4 = VMUL(VSUB(cc[i + 3*ido + 1], cc[i + 1*ido + 1]), LD_PS1(fsign));
ti4 = VMUL(VSUB(cc[i + 1*ido + 0], cc[i + 3*ido + 0]), LD_PS1(fsign));
tr3 = VADD(cc[i + ido + 0], cc[i + 3*ido + 0]);
ti3 = VADD(cc[i + ido + 1], cc[i + 3*ido + 1]);
ch[i] = VADD(tr2, tr3);
cr3 = VSUB(tr2, tr3);
ch[i + 1] = VADD(ti2, ti3);
ci3 = VSUB(ti2, ti3);
cr2 = VADD(tr1, tr4);
cr4 = VSUB(tr1, tr4);
ci2 = VADD(ti1, ti4);
ci4 = VSUB(ti1, ti4);
wr1=wa1[i], wi1=fsign*wa1[i+1];
VCPLXMUL(cr2, ci2, LD_PS1(wr1), LD_PS1(wi1));
wr2=wa2[i], wi2=fsign*wa2[i+1];
ch[i + l1ido] = cr2;
ch[i + l1ido + 1] = ci2;
VCPLXMUL(cr3, ci3, LD_PS1(wr2), LD_PS1(wi2));
wr3=wa3[i], wi3=fsign*wa3[i+1];
ch[i + 2*l1ido] = cr3;
ch[i + 2*l1ido + 1] = ci3;
VCPLXMUL(cr4, ci4, LD_PS1(wr3), LD_PS1(wi3));
ch[i + 3*l1ido] = cr4;
ch[i + 3*l1ido + 1] = ci4;
}
}
}
} /* passf4 */
/*
passf5 and passb5 has been merged here, fsign = -1 for passf5, +1 for passb5
*/
static NEVER_INLINE(void) passf5_ps(int ido, int l1, const v4sd *cc, v4sd *ch,
const double *wa1, const double *wa2,
const double *wa3, const double *wa4, double fsign) {
static const double tr11 = .309016994374947f;
const double ti11 = .951056516295154f*fsign;
static const double tr12 = -.809016994374947f;
const double ti12 = .587785252292473f*fsign;
/* Local variables */
int i, k;
v4sd ci2, ci3, ci4, ci5, di3, di4, di5, di2, cr2, cr3, cr5, cr4, ti2, ti3,
ti4, ti5, dr3, dr4, dr5, dr2, tr2, tr3, tr4, tr5;
double wr1, wi1, wr2, wi2, wr3, wi3, wr4, wi4;
#define cc_ref(a_1,a_2) cc[(a_2-1)*ido + a_1 + 1]
#define ch_ref(a_1,a_3) ch[(a_3-1)*l1*ido + a_1 + 1]
assert(ido > 2);
for (k = 0; k < l1; ++k, cc += 5*ido, ch += ido) {
for (i = 0; i < ido-1; i += 2) {
ti5 = VSUB(cc_ref(i , 2), cc_ref(i , 5));
ti2 = VADD(cc_ref(i , 2), cc_ref(i , 5));
ti4 = VSUB(cc_ref(i , 3), cc_ref(i , 4));
ti3 = VADD(cc_ref(i , 3), cc_ref(i , 4));
tr5 = VSUB(cc_ref(i-1, 2), cc_ref(i-1, 5));
tr2 = VADD(cc_ref(i-1, 2), cc_ref(i-1, 5));
tr4 = VSUB(cc_ref(i-1, 3), cc_ref(i-1, 4));
tr3 = VADD(cc_ref(i-1, 3), cc_ref(i-1, 4));
ch_ref(i-1, 1) = VADD(cc_ref(i-1, 1), VADD(tr2, tr3));
ch_ref(i , 1) = VADD(cc_ref(i , 1), VADD(ti2, ti3));
cr2 = VADD(cc_ref(i-1, 1), VADD(SVMUL(tr11, tr2),SVMUL(tr12, tr3)));
ci2 = VADD(cc_ref(i , 1), VADD(SVMUL(tr11, ti2),SVMUL(tr12, ti3)));
cr3 = VADD(cc_ref(i-1, 1), VADD(SVMUL(tr12, tr2),SVMUL(tr11, tr3)));
ci3 = VADD(cc_ref(i , 1), VADD(SVMUL(tr12, ti2),SVMUL(tr11, ti3)));
cr5 = VADD(SVMUL(ti11, tr5), SVMUL(ti12, tr4));
ci5 = VADD(SVMUL(ti11, ti5), SVMUL(ti12, ti4));
cr4 = VSUB(SVMUL(ti12, tr5), SVMUL(ti11, tr4));
ci4 = VSUB(SVMUL(ti12, ti5), SVMUL(ti11, ti4));
dr3 = VSUB(cr3, ci4);
dr4 = VADD(cr3, ci4);
di3 = VADD(ci3, cr4);
di4 = VSUB(ci3, cr4);
dr5 = VADD(cr2, ci5);
dr2 = VSUB(cr2, ci5);
di5 = VSUB(ci2, cr5);
di2 = VADD(ci2, cr5);
wr1=wa1[i], wi1=fsign*wa1[i+1], wr2=wa2[i], wi2=fsign*wa2[i+1];
wr3=wa3[i], wi3=fsign*wa3[i+1], wr4=wa4[i], wi4=fsign*wa4[i+1];
VCPLXMUL(dr2, di2, LD_PS1(wr1), LD_PS1(wi1));
ch_ref(i - 1, 2) = dr2;
ch_ref(i, 2) = di2;
VCPLXMUL(dr3, di3, LD_PS1(wr2), LD_PS1(wi2));
ch_ref(i - 1, 3) = dr3;
ch_ref(i, 3) = di3;
VCPLXMUL(dr4, di4, LD_PS1(wr3), LD_PS1(wi3));
ch_ref(i - 1, 4) = dr4;
ch_ref(i, 4) = di4;
VCPLXMUL(dr5, di5, LD_PS1(wr4), LD_PS1(wi4));
ch_ref(i - 1, 5) = dr5;
ch_ref(i, 5) = di5;
}
}
#undef ch_ref
#undef cc_ref
}
static NEVER_INLINE(void) radf2_ps(int ido, int l1, const v4sd * RESTRICT cc, v4sd * RESTRICT ch, const double *wa1) {
static const double minus_one = -1.f;
int i, k, l1ido = l1*ido;
for (k=0; k < l1ido; k += ido) {
v4sd a = cc[k], b = cc[k + l1ido];
ch[2*k] = VADD(a, b);
ch[2*(k+ido)-1] = VSUB(a, b);
}
if (ido < 2) return;
if (ido != 2) {
for (k=0; k < l1ido; k += ido) {
for (i=2; i<ido; i+=2) {
v4sd tr2 = cc[i - 1 + k + l1ido], ti2 = cc[i + k + l1ido];
v4sd br = cc[i - 1 + k], bi = cc[i + k];
VCPLXMULCONJ(tr2, ti2, LD_PS1(wa1[i - 2]), LD_PS1(wa1[i - 1]));
ch[i + 2*k] = VADD(bi, ti2);
ch[2*(k+ido) - i] = VSUB(ti2, bi);
ch[i - 1 + 2*k] = VADD(br, tr2);
ch[2*(k+ido) - i -1] = VSUB(br, tr2);
}
}
if (ido % 2 == 1) return;
}
for (k=0; k < l1ido; k += ido) {
ch[2*k + ido] = SVMUL(minus_one, cc[ido-1 + k + l1ido]);
ch[2*k + ido-1] = cc[k + ido-1];
}
} /* radf2 */
static NEVER_INLINE(void) radb2_ps(int ido, int l1, const v4sd *cc, v4sd *ch, const double *wa1) {
static const double minus_two=-2;
int i, k, l1ido = l1*ido;
v4sd a,b,c,d, tr2, ti2;
for (k=0; k < l1ido; k += ido) {
a = cc[2*k]; b = cc[2*(k+ido) - 1];
ch[k] = VADD(a, b);
ch[k + l1ido] =VSUB(a, b);
}
if (ido < 2) return;
if (ido != 2) {
for (k = 0; k < l1ido; k += ido) {
for (i = 2; i < ido; i += 2) {
a = cc[i-1 + 2*k]; b = cc[2*(k + ido) - i - 1];
c = cc[i+0 + 2*k]; d = cc[2*(k + ido) - i + 0];
ch[i-1 + k] = VADD(a, b);
tr2 = VSUB(a, b);
ch[i+0 + k] = VSUB(c, d);
ti2 = VADD(c, d);
VCPLXMUL(tr2, ti2, LD_PS1(wa1[i - 2]), LD_PS1(wa1[i - 1]));
ch[i-1 + k + l1ido] = tr2;
ch[i+0 + k + l1ido] = ti2;
}
}
if (ido % 2 == 1) return;
}
for (k = 0; k < l1ido; k += ido) {
a = cc[2*k + ido-1]; b = cc[2*k + ido];
ch[k + ido-1] = VADD(a,a);
ch[k + ido-1 + l1ido] = SVMUL(minus_two, b);
}
} /* radb2 */
static void radf3_ps(int ido, int l1, const v4sd * RESTRICT cc, v4sd * RESTRICT ch,
const double *wa1, const double *wa2) {
static const double taur = -0.5f;
static const double taui = 0.866025403784439f;
int i, k, ic;
v4sd ci2, di2, di3, cr2, dr2, dr3, ti2, ti3, tr2, tr3, wr1, wi1, wr2, wi2;
for (k=0; k<l1; k++) {
cr2 = VADD(cc[(k + l1)*ido], cc[(k + 2*l1)*ido]);
ch[3*k*ido] = VADD(cc[k*ido], cr2);
ch[(3*k+2)*ido] = SVMUL(taui, VSUB(cc[(k + l1*2)*ido], cc[(k + l1)*ido]));
ch[ido-1 + (3*k + 1)*ido] = VADD(cc[k*ido], SVMUL(taur, cr2));
}
if (ido == 1) return;
for (k=0; k<l1; k++) {
for (i=2; i<ido; i+=2) {
ic = ido - i;
wr1 = LD_PS1(wa1[i - 2]); wi1 = LD_PS1(wa1[i - 1]);
dr2 = cc[i - 1 + (k + l1)*ido]; di2 = cc[i + (k + l1)*ido];
VCPLXMULCONJ(dr2, di2, wr1, wi1);
wr2 = LD_PS1(wa2[i - 2]); wi2 = LD_PS1(wa2[i - 1]);
dr3 = cc[i - 1 + (k + l1*2)*ido]; di3 = cc[i + (k + l1*2)*ido];
VCPLXMULCONJ(dr3, di3, wr2, wi2);
cr2 = VADD(dr2, dr3);
ci2 = VADD(di2, di3);
ch[i - 1 + 3*k*ido] = VADD(cc[i - 1 + k*ido], cr2);
ch[i + 3*k*ido] = VADD(cc[i + k*ido], ci2);
tr2 = VADD(cc[i - 1 + k*ido], SVMUL(taur, cr2));
ti2 = VADD(cc[i + k*ido], SVMUL(taur, ci2));
tr3 = SVMUL(taui, VSUB(di2, di3));
ti3 = SVMUL(taui, VSUB(dr3, dr2));
ch[i - 1 + (3*k + 2)*ido] = VADD(tr2, tr3);
ch[ic - 1 + (3*k + 1)*ido] = VSUB(tr2, tr3);
ch[i + (3*k + 2)*ido] = VADD(ti2, ti3);
ch[ic + (3*k + 1)*ido] = VSUB(ti3, ti2);
}
}
} /* radf3 */
static void radb3_ps(int ido, int l1, const v4sd *RESTRICT cc, v4sd *RESTRICT ch,
const double *wa1, const double *wa2)
{
static const double taur = -0.5f;
static const double taui = 0.866025403784439f;
static const double taui_2 = 0.866025403784439f*2;
int i, k, ic;
v4sd ci2, ci3, di2, di3, cr2, cr3, dr2, dr3, ti2, tr2;
for (k=0; k<l1; k++) {
tr2 = cc[ido-1 + (3*k + 1)*ido]; tr2 = VADD(tr2,tr2);
cr2 = VMADD(LD_PS1(taur), tr2, cc[3*k*ido]);
ch[k*ido] = VADD(cc[3*k*ido], tr2);
ci3 = SVMUL(taui_2, cc[(3*k + 2)*ido]);
ch[(k + l1)*ido] = VSUB(cr2, ci3);
ch[(k + 2*l1)*ido] = VADD(cr2, ci3);
}
if (ido == 1) return;
for (k=0; k<l1; k++) {
for (i=2; i<ido; i+=2) {
ic = ido - i;
tr2 = VADD(cc[i - 1 + (3*k + 2)*ido], cc[ic - 1 + (3*k + 1)*ido]);
cr2 = VMADD(LD_PS1(taur), tr2, cc[i - 1 + 3*k*ido]);
ch[i - 1 + k*ido] = VADD(cc[i - 1 + 3*k*ido], tr2);
ti2 = VSUB(cc[i + (3*k + 2)*ido], cc[ic + (3*k + 1)*ido]);
ci2 = VMADD(LD_PS1(taur), ti2, cc[i + 3*k*ido]);
ch[i + k*ido] = VADD(cc[i + 3*k*ido], ti2);
cr3 = SVMUL(taui, VSUB(cc[i - 1 + (3*k + 2)*ido], cc[ic - 1 + (3*k + 1)*ido]));
ci3 = SVMUL(taui, VADD(cc[i + (3*k + 2)*ido], cc[ic + (3*k + 1)*ido]));
dr2 = VSUB(cr2, ci3);
dr3 = VADD(cr2, ci3);
di2 = VADD(ci2, cr3);
di3 = VSUB(ci2, cr3);
VCPLXMUL(dr2, di2, LD_PS1(wa1[i-2]), LD_PS1(wa1[i-1]));
ch[i - 1 + (k + l1)*ido] = dr2;
ch[i + (k + l1)*ido] = di2;
VCPLXMUL(dr3, di3, LD_PS1(wa2[i-2]), LD_PS1(wa2[i-1]));
ch[i - 1 + (k + 2*l1)*ido] = dr3;
ch[i + (k + 2*l1)*ido] = di3;
}
}
} /* radb3 */
static NEVER_INLINE(void) radf4_ps(int ido, int l1, const v4sd *RESTRICT cc, v4sd * RESTRICT ch,
const double * RESTRICT wa1, const double * RESTRICT wa2, const double * RESTRICT wa3)
{
static const double minus_hsqt2 = (double)-0.7071067811865475;
int i, k, l1ido = l1*ido;
{
const v4sd *RESTRICT cc_ = cc, * RESTRICT cc_end = cc + l1ido;
v4sd * RESTRICT ch_ = ch;
while (cc < cc_end) {
// this loop represents between 25% and 40% of total radf4_ps cost !
v4sd a0 = cc[0], a1 = cc[l1ido];
v4sd a2 = cc[2*l1ido], a3 = cc[3*l1ido];
v4sd tr1 = VADD(a1, a3);
v4sd tr2 = VADD(a0, a2);
ch[2*ido-1] = VSUB(a0, a2);
ch[2*ido ] = VSUB(a3, a1);
ch[0 ] = VADD(tr1, tr2);
ch[4*ido-1] = VSUB(tr2, tr1);
cc += ido; ch += 4*ido;
}
cc = cc_; ch = ch_;
}
if (ido < 2) return;
if (ido != 2) {
for (k = 0; k < l1ido; k += ido) {
const v4sd * RESTRICT pc = (v4sd*)(cc + 1 + k);
for (i=2; i<ido; i += 2, pc += 2) {
int ic = ido - i;
v4sd wr, wi, cr2, ci2, cr3, ci3, cr4, ci4;
v4sd tr1, ti1, tr2, ti2, tr3, ti3, tr4, ti4;
cr2 = pc[1*l1ido+0];
ci2 = pc[1*l1ido+1];
wr=LD_PS1(wa1[i - 2]);
wi=LD_PS1(wa1[i - 1]);
VCPLXMULCONJ(cr2,ci2,wr,wi);
cr3 = pc[2*l1ido+0];
ci3 = pc[2*l1ido+1];
wr = LD_PS1(wa2[i-2]);
wi = LD_PS1(wa2[i-1]);
VCPLXMULCONJ(cr3, ci3, wr, wi);
cr4 = pc[3*l1ido];
ci4 = pc[3*l1ido+1];
wr = LD_PS1(wa3[i-2]);
wi = LD_PS1(wa3[i-1]);
VCPLXMULCONJ(cr4, ci4, wr, wi);
/* at this point, on SSE, five of "cr2 cr3 cr4 ci2 ci3 ci4" should be loaded in registers */
tr1 = VADD(cr2,cr4);
tr4 = VSUB(cr4,cr2);
tr2 = VADD(pc[0],cr3);
tr3 = VSUB(pc[0],cr3);
ch[i - 1 + 4*k] = VADD(tr1,tr2);
ch[ic - 1 + 4*k + 3*ido] = VSUB(tr2,tr1); // at this point tr1 and tr2 can be disposed
ti1 = VADD(ci2,ci4);
ti4 = VSUB(ci2,ci4);
ch[i - 1 + 4*k + 2*ido] = VADD(ti4,tr3);
ch[ic - 1 + 4*k + 1*ido] = VSUB(tr3,ti4); // dispose tr3, ti4
ti2 = VADD(pc[1],ci3);
ti3 = VSUB(pc[1],ci3);
ch[i + 4*k] = VADD(ti1, ti2);
ch[ic + 4*k + 3*ido] = VSUB(ti1, ti2);
ch[i + 4*k + 2*ido] = VADD(tr4, ti3);
ch[ic + 4*k + 1*ido] = VSUB(tr4, ti3);
}
}
if (ido % 2 == 1) return;
}
for (k=0; k<l1ido; k += ido) {
v4sd a = cc[ido-1 + k + l1ido], b = cc[ido-1 + k + 3*l1ido];
v4sd c = cc[ido-1 + k], d = cc[ido-1 + k + 2*l1ido];
v4sd ti1 = SVMUL(minus_hsqt2, VADD(a, b));
v4sd tr1 = SVMUL(minus_hsqt2, VSUB(b, a));
ch[ido-1 + 4*k] = VADD(tr1, c);
ch[ido-1 + 4*k + 2*ido] = VSUB(c, tr1);
ch[4*k + 1*ido] = VSUB(ti1, d);
ch[4*k + 3*ido] = VADD(ti1, d);
}
} /* radf4 */
static NEVER_INLINE(void) radb4_ps(int ido, int l1, const v4sd * RESTRICT cc, v4sd * RESTRICT ch,
const double * RESTRICT wa1, const double * RESTRICT wa2, const double *RESTRICT wa3)
{
static const double minus_sqrt2 = (double)-1.414213562373095;
static const double two = 2.f;
int i, k, l1ido = l1*ido;
v4sd ci2, ci3, ci4, cr2, cr3, cr4, ti1, ti2, ti3, ti4, tr1, tr2, tr3, tr4;
{
const v4sd *RESTRICT cc_ = cc, * RESTRICT ch_end = ch + l1ido;
v4sd *ch_ = ch;
while (ch < ch_end) {
v4sd a = cc[0], b = cc[4*ido-1];
v4sd c = cc[2*ido], d = cc[2*ido-1];
tr3 = SVMUL(two,d);
tr2 = VADD(a,b);
tr1 = VSUB(a,b);
tr4 = SVMUL(two,c);
ch[0*l1ido] = VADD(tr2, tr3);
ch[2*l1ido] = VSUB(tr2, tr3);
ch[1*l1ido] = VSUB(tr1, tr4);
ch[3*l1ido] = VADD(tr1, tr4);
cc += 4*ido; ch += ido;
}
cc = cc_; ch = ch_;
}
if (ido < 2) return;
if (ido != 2) {
for (k = 0; k < l1ido; k += ido) {
const v4sd * RESTRICT pc = (v4sd*)(cc - 1 + 4*k);
v4sd * RESTRICT ph = (v4sd*)(ch + k + 1);
for (i = 2; i < ido; i += 2) {
tr1 = VSUB(pc[i], pc[4*ido - i]);
tr2 = VADD(pc[i], pc[4*ido - i]);
ti4 = VSUB(pc[2*ido + i], pc[2*ido - i]);
tr3 = VADD(pc[2*ido + i], pc[2*ido - i]);
ph[0] = VADD(tr2, tr3);
cr3 = VSUB(tr2, tr3);
ti3 = VSUB(pc[2*ido + i + 1], pc[2*ido - i + 1]);
tr4 = VADD(pc[2*ido + i + 1], pc[2*ido - i + 1]);
cr2 = VSUB(tr1, tr4);
cr4 = VADD(tr1, tr4);
ti1 = VADD(pc[i + 1], pc[4*ido - i + 1]);
ti2 = VSUB(pc[i + 1], pc[4*ido - i + 1]);
ph[1] = VADD(ti2, ti3); ph += l1ido;
ci3 = VSUB(ti2, ti3);
ci2 = VADD(ti1, ti4);
ci4 = VSUB(ti1, ti4);
VCPLXMUL(cr2, ci2, LD_PS1(wa1[i-2]), LD_PS1(wa1[i-1]));
ph[0] = cr2;
ph[1] = ci2; ph += l1ido;
VCPLXMUL(cr3, ci3, LD_PS1(wa2[i-2]), LD_PS1(wa2[i-1]));
ph[0] = cr3;
ph[1] = ci3; ph += l1ido;
VCPLXMUL(cr4, ci4, LD_PS1(wa3[i-2]), LD_PS1(wa3[i-1]));
ph[0] = cr4;
ph[1] = ci4; ph = ph - 3*l1ido + 2;
}
}
if (ido % 2 == 1) return;
}
for (k=0; k < l1ido; k+=ido) {
int i0 = 4*k + ido;
v4sd c = cc[i0-1], d = cc[i0 + 2*ido-1];
v4sd a = cc[i0+0], b = cc[i0 + 2*ido+0];
tr1 = VSUB(c,d);
tr2 = VADD(c,d);
ti1 = VADD(b,a);
ti2 = VSUB(b,a);
ch[ido-1 + k + 0*l1ido] = VADD(tr2,tr2);
ch[ido-1 + k + 1*l1ido] = SVMUL(minus_sqrt2, VSUB(ti1, tr1));
ch[ido-1 + k + 2*l1ido] = VADD(ti2, ti2);
ch[ido-1 + k + 3*l1ido] = SVMUL(minus_sqrt2, VADD(ti1, tr1));
}
} /* radb4 */
static void radf5_ps(int ido, int l1, const v4sd * RESTRICT cc, v4sd * RESTRICT ch,
const double *wa1, const double *wa2, const double *wa3, const double *wa4)
{
static const double tr11 = .309016994374947f;
static const double ti11 = .951056516295154f;
static const double tr12 = -.809016994374947f;
static const double ti12 = .587785252292473f;
/* System generated locals */
int cc_offset, ch_offset;
/* Local variables */
int i, k, ic;
v4sd ci2, di2, ci4, ci5, di3, di4, di5, ci3, cr2, cr3, dr2, dr3, dr4, dr5,
cr5, cr4, ti2, ti3, ti5, ti4, tr2, tr3, tr4, tr5;
int idp2;
#define cc_ref(a_1,a_2,a_3) cc[((a_3)*l1 + (a_2))*ido + a_1]
#define ch_ref(a_1,a_2,a_3) ch[((a_3)*5 + (a_2))*ido + a_1]
/* Parameter adjustments */
ch_offset = 1 + ido * 6;
ch -= ch_offset;
cc_offset = 1 + ido * (1 + l1);
cc -= cc_offset;
/* Function Body */
for (k = 1; k <= l1; ++k) {
cr2 = VADD(cc_ref(1, k, 5), cc_ref(1, k, 2));
ci5 = VSUB(cc_ref(1, k, 5), cc_ref(1, k, 2));
cr3 = VADD(cc_ref(1, k, 4), cc_ref(1, k, 3));
ci4 = VSUB(cc_ref(1, k, 4), cc_ref(1, k, 3));
ch_ref(1, 1, k) = VADD(cc_ref(1, k, 1), VADD(cr2, cr3));
ch_ref(ido, 2, k) = VADD(cc_ref(1, k, 1), VADD(SVMUL(tr11, cr2), SVMUL(tr12, cr3)));
ch_ref(1, 3, k) = VADD(SVMUL(ti11, ci5), SVMUL(ti12, ci4));
ch_ref(ido, 4, k) = VADD(cc_ref(1, k, 1), VADD(SVMUL(tr12, cr2), SVMUL(tr11, cr3)));
ch_ref(1, 5, k) = VSUB(SVMUL(ti12, ci5), SVMUL(ti11, ci4));
//printf("pffft: radf5, k=%d ch_ref=%f, ci4=%f\n", k, ch_ref(1, 5, k), ci4);
}
if (ido == 1) {
return;
}
idp2 = ido + 2;
for (k = 1; k <= l1; ++k) {
for (i = 3; i <= ido; i += 2) {
ic = idp2 - i;
dr2 = LD_PS1(wa1[i-3]); di2 = LD_PS1(wa1[i-2]);
dr3 = LD_PS1(wa2[i-3]); di3 = LD_PS1(wa2[i-2]);
dr4 = LD_PS1(wa3[i-3]); di4 = LD_PS1(wa3[i-2]);
dr5 = LD_PS1(wa4[i-3]); di5 = LD_PS1(wa4[i-2]);
VCPLXMULCONJ(dr2, di2, cc_ref(i-1, k, 2), cc_ref(i, k, 2));
VCPLXMULCONJ(dr3, di3, cc_ref(i-1, k, 3), cc_ref(i, k, 3));
VCPLXMULCONJ(dr4, di4, cc_ref(i-1, k, 4), cc_ref(i, k, 4));
VCPLXMULCONJ(dr5, di5, cc_ref(i-1, k, 5), cc_ref(i, k, 5));
cr2 = VADD(dr2, dr5);
ci5 = VSUB(dr5, dr2);
cr5 = VSUB(di2, di5);
ci2 = VADD(di2, di5);
cr3 = VADD(dr3, dr4);
ci4 = VSUB(dr4, dr3);
cr4 = VSUB(di3, di4);
ci3 = VADD(di3, di4);
ch_ref(i - 1, 1, k) = VADD(cc_ref(i - 1, k, 1), VADD(cr2, cr3));
ch_ref(i, 1, k) = VSUB(cc_ref(i, k, 1), VADD(ci2, ci3));//
tr2 = VADD(cc_ref(i - 1, k, 1), VADD(SVMUL(tr11, cr2), SVMUL(tr12, cr3)));
ti2 = VSUB(cc_ref(i, k, 1), VADD(SVMUL(tr11, ci2), SVMUL(tr12, ci3)));//
tr3 = VADD(cc_ref(i - 1, k, 1), VADD(SVMUL(tr12, cr2), SVMUL(tr11, cr3)));
ti3 = VSUB(cc_ref(i, k, 1), VADD(SVMUL(tr12, ci2), SVMUL(tr11, ci3)));//
tr5 = VADD(SVMUL(ti11, cr5), SVMUL(ti12, cr4));
ti5 = VADD(SVMUL(ti11, ci5), SVMUL(ti12, ci4));
tr4 = VSUB(SVMUL(ti12, cr5), SVMUL(ti11, cr4));
ti4 = VSUB(SVMUL(ti12, ci5), SVMUL(ti11, ci4));
ch_ref(i - 1, 3, k) = VSUB(tr2, tr5);
ch_ref(ic - 1, 2, k) = VADD(tr2, tr5);
ch_ref(i, 3, k) = VADD(ti2, ti5);
ch_ref(ic, 2, k) = VSUB(ti5, ti2);
ch_ref(i - 1, 5, k) = VSUB(tr3, tr4);
ch_ref(ic - 1, 4, k) = VADD(tr3, tr4);
ch_ref(i, 5, k) = VADD(ti3, ti4);
ch_ref(ic, 4, k) = VSUB(ti4, ti3);
}
}
#undef cc_ref
#undef ch_ref
} /* radf5 */
static void radb5_ps(int ido, int l1, const v4sd *RESTRICT cc, v4sd *RESTRICT ch,
const double *wa1, const double *wa2, const double *wa3, const double *wa4)
{
static const double tr11 = .309016994374947f;
static const double ti11 = .951056516295154f;
static const double tr12 = -.809016994374947f;
static const double ti12 = .587785252292473f;
int cc_offset, ch_offset;
/* Local variables */
int i, k, ic;
v4sd ci2, ci3, ci4, ci5, di3, di4, di5, di2, cr2, cr3, cr5, cr4, ti2, ti3,
ti4, ti5, dr3, dr4, dr5, dr2, tr2, tr3, tr4, tr5;
int idp2;
#define cc_ref(a_1,a_2,a_3) cc[((a_3)*5 + (a_2))*ido + a_1]
#define ch_ref(a_1,a_2,a_3) ch[((a_3)*l1 + (a_2))*ido + a_1]
/* Parameter adjustments */
ch_offset = 1 + ido * (1 + l1);
ch -= ch_offset;
cc_offset = 1 + ido * 6;
cc -= cc_offset;
/* Function Body */
for (k = 1; k <= l1; ++k) {
ti5 = VADD(cc_ref(1, 3, k), cc_ref(1, 3, k));
ti4 = VADD(cc_ref(1, 5, k), cc_ref(1, 5, k));
tr2 = VADD(cc_ref(ido, 2, k), cc_ref(ido, 2, k));
tr3 = VADD(cc_ref(ido, 4, k), cc_ref(ido, 4, k));
ch_ref(1, k, 1) = VADD(cc_ref(1, 1, k), VADD(tr2, tr3));
cr2 = VADD(cc_ref(1, 1, k), VADD(SVMUL(tr11, tr2), SVMUL(tr12, tr3)));
cr3 = VADD(cc_ref(1, 1, k), VADD(SVMUL(tr12, tr2), SVMUL(tr11, tr3)));
ci5 = VADD(SVMUL(ti11, ti5), SVMUL(ti12, ti4));
ci4 = VSUB(SVMUL(ti12, ti5), SVMUL(ti11, ti4));
ch_ref(1, k, 2) = VSUB(cr2, ci5);
ch_ref(1, k, 3) = VSUB(cr3, ci4);
ch_ref(1, k, 4) = VADD(cr3, ci4);
ch_ref(1, k, 5) = VADD(cr2, ci5);
}
if (ido == 1) {
return;
}
idp2 = ido + 2;
for (k = 1; k <= l1; ++k) {
for (i = 3; i <= ido; i += 2) {
ic = idp2 - i;
ti5 = VADD(cc_ref(i , 3, k), cc_ref(ic , 2, k));
ti2 = VSUB(cc_ref(i , 3, k), cc_ref(ic , 2, k));
ti4 = VADD(cc_ref(i , 5, k), cc_ref(ic , 4, k));
ti3 = VSUB(cc_ref(i , 5, k), cc_ref(ic , 4, k));
tr5 = VSUB(cc_ref(i-1, 3, k), cc_ref(ic-1, 2, k));
tr2 = VADD(cc_ref(i-1, 3, k), cc_ref(ic-1, 2, k));
tr4 = VSUB(cc_ref(i-1, 5, k), cc_ref(ic-1, 4, k));
tr3 = VADD(cc_ref(i-1, 5, k), cc_ref(ic-1, 4, k));
ch_ref(i - 1, k, 1) = VADD(cc_ref(i-1, 1, k), VADD(tr2, tr3));
ch_ref(i, k, 1) = VADD(cc_ref(i, 1, k), VADD(ti2, ti3));
cr2 = VADD(cc_ref(i-1, 1, k), VADD(SVMUL(tr11, tr2), SVMUL(tr12, tr3)));
ci2 = VADD(cc_ref(i , 1, k), VADD(SVMUL(tr11, ti2), SVMUL(tr12, ti3)));
cr3 = VADD(cc_ref(i-1, 1, k), VADD(SVMUL(tr12, tr2), SVMUL(tr11, tr3)));
ci3 = VADD(cc_ref(i , 1, k), VADD(SVMUL(tr12, ti2), SVMUL(tr11, ti3)));
cr5 = VADD(SVMUL(ti11, tr5), SVMUL(ti12, tr4));
ci5 = VADD(SVMUL(ti11, ti5), SVMUL(ti12, ti4));
cr4 = VSUB(SVMUL(ti12, tr5), SVMUL(ti11, tr4));
ci4 = VSUB(SVMUL(ti12, ti5), SVMUL(ti11, ti4));
dr3 = VSUB(cr3, ci4);
dr4 = VADD(cr3, ci4);
di3 = VADD(ci3, cr4);
di4 = VSUB(ci3, cr4);
dr5 = VADD(cr2, ci5);
dr2 = VSUB(cr2, ci5);
di5 = VSUB(ci2, cr5);
di2 = VADD(ci2, cr5);
VCPLXMUL(dr2, di2, LD_PS1(wa1[i-3]), LD_PS1(wa1[i-2]));
VCPLXMUL(dr3, di3, LD_PS1(wa2[i-3]), LD_PS1(wa2[i-2]));
VCPLXMUL(dr4, di4, LD_PS1(wa3[i-3]), LD_PS1(wa3[i-2]));
VCPLXMUL(dr5, di5, LD_PS1(wa4[i-3]), LD_PS1(wa4[i-2]));
ch_ref(i-1, k, 2) = dr2; ch_ref(i, k, 2) = di2;
ch_ref(i-1, k, 3) = dr3; ch_ref(i, k, 3) = di3;
ch_ref(i-1, k, 4) = dr4; ch_ref(i, k, 4) = di4;
ch_ref(i-1, k, 5) = dr5; ch_ref(i, k, 5) = di5;
}
}
#undef cc_ref
#undef ch_ref
} /* radb5 */
static NEVER_INLINE(v4sd *) rfftf1_ps(int n, const v4sd *input_readonly, v4sd *work1, v4sd *work2,
const double *wa, const int *ifac) {
v4sd *in = (v4sd*)input_readonly;
v4sd *out = (in == work2 ? work1 : work2);
int nf = ifac[1], k1;
int l2 = n;
int iw = n-1;
assert(in != out && work1 != work2);
for (k1 = 1; k1 <= nf; ++k1) {
int kh = nf - k1;
int ip = ifac[kh + 2];
int l1 = l2 / ip;
int ido = n / l2;
iw -= (ip - 1)*ido;
switch (ip) {
case 5: {
int ix2 = iw + ido;
int ix3 = ix2 + ido;
int ix4 = ix3 + ido;
radf5_ps(ido, l1, in, out, &wa[iw], &wa[ix2], &wa[ix3], &wa[ix4]);
} break;
case 4: {
int ix2 = iw + ido;
int ix3 = ix2 + ido;
radf4_ps(ido, l1, in, out, &wa[iw], &wa[ix2], &wa[ix3]);
} break;
case 3: {
int ix2 = iw + ido;
radf3_ps(ido, l1, in, out, &wa[iw], &wa[ix2]);
} break;
case 2:
radf2_ps(ido, l1, in, out, &wa[iw]);
break;
default:
assert(0);
break;
}
l2 = l1;
if (out == work2) {